From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85E10C43219 for ; Mon, 30 May 2022 13:27:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236829AbiE3N1j (ORCPT ); Mon, 30 May 2022 09:27:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236737AbiE3NZ5 (ORCPT ); Mon, 30 May 2022 09:25:57 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66D6887206; Mon, 30 May 2022 06:25:27 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C4E2960E2D; Mon, 30 May 2022 13:25:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3F85DC3411F; Mon, 30 May 2022 13:25:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1653917126; bh=cz7EaM8E2HHkUwPlijx0Xy7QFc9ala/dWiZQqSjozhk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bdJYcYTSL2P/vS/iMtfjFpBnsrAvCNxV6uo/v8S4vR+0XcvavRBvBaQGrRfb+pbmR z+Nh1Y/FxT200JiE/c30yQobrgGDZ8HZx5W9KxlQ8V72smrMqFXBxcX2bwJaaRxC54 LnDy+Qk9uDsYzO9H5VEPLmn7qSyq504J7nRLV2YL8IoJhoD1ecqoqYKoAgom54vF7O qW3FdwdxPZgVihBNH8pEXH8MZn7lrv5AMCSppna99zJtLhjSEv3V4NlqZTc/i3uXEf 3lDSnV704fRt8Oki4E16SGg0Q41cD/RR0SfqEN1GufIqmd2huiPtRj8E50PzcLUoym 81k69WOFAeetQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Saaem Rizvi , Eric Yang , Pavle Kotarac , Alex Deucher , Sasha Levin , harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@linux.ie, daniel@ffwll.ch, nicholas.kazlauskas@amd.com, michael.strauss@amd.com, Jerry.Zuo@amd.com, meenakshikumar.somasundaram@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.18 023/159] drm/amd/display: Disabling Z10 on DCN31 Date: Mon, 30 May 2022 09:22:08 -0400 Message-Id: <20220530132425.1929512-23-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220530132425.1929512-1-sashal@kernel.org> References: <20220530132425.1929512-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Saaem Rizvi [ Upstream commit 5d5af34072c8b11f60960c3bea57ff9de5877791 ] [WHY] Z10 is should not be enabled by default on DCN31. [HOW] Using DC debug flags to disable Z10 by default on DCN31. Reviewed-by: Eric Yang Acked-by: Pavle Kotarac Signed-off-by: Saaem Rizvi Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c index 63934ecf6be8..d71e625cc476 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c @@ -1030,6 +1030,7 @@ static const struct dc_debug_options debug_defaults_drv = { .afmt = true, } }, + .disable_z10 = true, .optimize_edp_link_rate = true, .enable_sw_cntl_psr = true, .apply_vendor_specific_lttpr_wa = true, -- 2.35.1