From: Tinghan Shen <tinghan.shen@mediatek.com>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Lee Jones <lee.jones@linaro.org>,
Benson Leung <bleung@chromium.org>,
"Guenter Roeck" <groeck@chromium.org>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
Daisuke Nojiri <dnojiri@chromium.org>,
Kees Cook <keescook@chromium.org>,
Tinghan Shen <tinghan.shen@mediatek.com>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>,
Prashant Malani <pmalani@chromium.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>
Cc: <linux-remoteproc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <chrome-platform@lists.linux.dev>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
<weishunc@google.com>
Subject: [PATCH v2 9/9] mfd: cros_ec: Add SCP core 1 as a new CrOS EC MCU
Date: Wed, 8 Jun 2022 16:35:53 +0800 [thread overview]
Message-ID: <20220608083553.8697-10-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20220608083553.8697-1-tinghan.shen@mediatek.com>
MT8195 System Companion Processors(SCP) is a dual-core RISC-V MCU.
Add a new cros feature id to represent the SCP 2nd core.
The 1st core is referred to as 'core 0', and the 2nd core is referred
to as 'core 1'.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
---
drivers/mfd/cros_ec_dev.c | 5 +++++
include/linux/platform_data/cros_ec_commands.h | 2 ++
include/linux/platform_data/cros_ec_proto.h | 1 +
3 files changed, 8 insertions(+)
diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c
index 546feef851ab..7be2e23525e1 100644
--- a/drivers/mfd/cros_ec_dev.c
+++ b/drivers/mfd/cros_ec_dev.c
@@ -64,6 +64,11 @@ static const struct cros_feature_to_name cros_mcu_devices[] = {
.name = CROS_EC_DEV_SCP_NAME,
.desc = "System Control Processor",
},
+ {
+ .id = EC_FEATURE_SCP_C1,
+ .name = CROS_EC_DEV_SCP_C1_NAME,
+ .desc = "System Control Processor 2nd Core",
+ },
{
.id = EC_FEATURE_TOUCHPAD,
.name = CROS_EC_DEV_TP_NAME,
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index c23554531961..1176cdc92d23 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -1296,6 +1296,8 @@ enum ec_feature_code {
* mux.
*/
EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
+ /* The MCU is a System Companion Processor (SCP) 2nd Core. */
+ EC_FEATURE_SCP_C1 = 45,
};
#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
diff --git a/include/linux/platform_data/cros_ec_proto.h b/include/linux/platform_data/cros_ec_proto.h
index df3c78c92ca2..12fc60f3c90d 100644
--- a/include/linux/platform_data/cros_ec_proto.h
+++ b/include/linux/platform_data/cros_ec_proto.h
@@ -19,6 +19,7 @@
#define CROS_EC_DEV_ISH_NAME "cros_ish"
#define CROS_EC_DEV_PD_NAME "cros_pd"
#define CROS_EC_DEV_SCP_NAME "cros_scp"
+#define CROS_EC_DEV_SCP_C1_NAME "cros_scp_c1"
#define CROS_EC_DEV_TP_NAME "cros_tp"
/*
--
2.18.0
next prev parent reply other threads:[~2022-06-08 9:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-08 8:35 [PATCH v2 0/9] Add support for MT8195 SCP 2nd core Tinghan Shen
2022-06-08 8:35 ` [PATCH v2 1/9] dt-binding: remoteproc: mediatek: Support dual-core SCP Tinghan Shen
2022-06-09 20:51 ` Rob Herring
2022-06-08 8:35 ` [PATCH v2 2/9] remoteproc: mediatek: Support hanlding scp core 1 wdt timeout Tinghan Shen
2022-08-29 17:40 ` Mathieu Poirier
2022-09-08 10:38 ` Tinghan Shen
2022-06-08 8:35 ` [PATCH v2 3/9] remoteproc: mediatek: Add SCP core 1 register definitions Tinghan Shen
2022-08-29 17:46 ` Mathieu Poirier
2022-06-08 8:35 ` [PATCH v2 4/9] remoteproc: mediatek: Support probing for the 2nd core of dual-core SCP Tinghan Shen
2022-08-29 19:42 ` Mathieu Poirier
2022-09-08 11:17 ` Tinghan Shen
[not found] ` <CANLsYkx6kXk8u_ajFbnhdWTkZBLtrq_z02jryLBSVH0x--_ZFw@mail.gmail.com>
2022-09-16 11:59 ` TingHan Shen
2022-09-16 17:15 ` Mathieu Poirier
2022-09-19 9:46 ` TingHan Shen
2022-09-19 20:53 ` Mathieu Poirier
2022-09-23 7:12 ` Peng Fan
2022-06-08 8:35 ` [PATCH v2 5/9] remoteproc: mediatek: Add chip dependent operations for SCP core 1 Tinghan Shen
2022-06-08 8:35 ` [PATCH v2 6/9] remoteproc: mediatek: Add SCP core 1 SRAM offset Tinghan Shen
2022-06-08 8:35 ` [PATCH v2 7/9] remoteproc: mediatek: Add SCP core 1 as a rproc subdevice Tinghan Shen
2022-06-08 8:35 ` [PATCH v2 8/9] remoteproc: mediatek: Wait SCP core 1 probe done Tinghan Shen
2022-06-08 8:35 ` Tinghan Shen [this message]
2022-06-09 5:45 ` [PATCH v2 0/9] Add support for MT8195 SCP 2nd core Tinghan Shen
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