From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 935C7C43334 for ; Mon, 13 Jun 2022 12:50:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355403AbiFMMub (ORCPT ); Mon, 13 Jun 2022 08:50:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34278 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357733AbiFMMtL (ORCPT ); Mon, 13 Jun 2022 08:49:11 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B43462BD6; Mon, 13 Jun 2022 04:11:54 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id DDCBE60EAB; Mon, 13 Jun 2022 11:11:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ED3F3C34114; Mon, 13 Jun 2022 11:11:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1655118700; bh=WFGQ7ZAPxUpvCEKv1vpG6rEPqrzyXIIXezFbT/tLKgw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zw4weku2nsKIXem6YmvUmLvDRfzb77iri9z/S93NZiy3YxNW9QGm3N7EOW/xvjh4v QuvuGTaXhc4HPGTzmmCpl+pPt1SEKNI26PmViw27EJ0crRV3BMnsWDSSsKwZKTl2h/ DNcaTZeCJexS0J6X/kHeXMcweitD9SCR4Az0Ve58= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Johan Hovold , Lorenzo Pieralisi , Bjorn Helgaas , Bjorn Andersson Subject: [PATCH 5.10 171/172] PCI: qcom: Fix pipe clock imbalance Date: Mon, 13 Jun 2022 12:12:11 +0200 Message-Id: <20220613094923.461428580@linuxfoundation.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220613094850.166931805@linuxfoundation.org> References: <20220613094850.166931805@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Johan Hovold commit fdf6a2f533115ec5d4d9629178f8196331f1ac50 upstream. Fix a clock imbalance introduced by ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller"), which enables the pipe clock both in init() and in post_init() but only disables in post_deinit(). Note that the pipe clock was also never disabled in the init() error paths and that enabling the clock before powering up the PHY looks questionable. Link: https://lore.kernel.org/r/20220401133351.10113-1-johan+linaro@kernel.org Fixes: ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller") Signed-off-by: Johan Hovold Signed-off-by: Lorenzo Pieralisi Signed-off-by: Bjorn Helgaas Reviewed-by: Bjorn Andersson Cc: stable@vger.kernel.org # 5.6 Signed-off-by: Greg Kroah-Hartman --- drivers/pci/controller/dwc/pcie-qcom.c | 6 ------ 1 file changed, 6 deletions(-) --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1192,12 +1192,6 @@ static int qcom_pcie_init_2_7_0(struct q goto err_disable_clocks; } - ret = clk_prepare_enable(res->pipe_clk); - if (ret) { - dev_err(dev, "cannot prepare/enable pipe clock\n"); - goto err_disable_clocks; - } - /* configure PCIe to RC mode */ writel(DEVICE_TYPE_RC, pcie->parf + PCIE20_PARF_DEVICE_TYPE);