From: Stephen Boyd <sboyd@kernel.org>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
mturquette@baylibre.com
Cc: matthias.bgg@gmail.com, wenst@chromium.org,
angelogioacchino.delregno@collabora.com, miles.chen@mediatek.com,
chun-jie.chen@mediatek.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
rex-bc.chen@mediatek.com
Subject: Re: [PATCH] clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parent
Date: Wed, 15 Jun 2022 19:44:40 -0700 [thread overview]
Message-ID: <20220616024442.1337EC3411E@smtp.kernel.org> (raw)
In-Reply-To: <20220614091020.21472-1-angelogioacchino.delregno@collabora.com>
Quoting AngeloGioacchino Del Regno (2022-06-14 02:10:20)
> Add the CLK_SET_RATE_PARENT flag to the CLK_VDO0_DP_INTF0_DP_INTF
> clock: this is required to trigger clock source selection on
> CLK_TOP_EDP, while avoiding to manage the enablement of the former
> separately from the latter in the displayport driver.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
Any Fixes tag?
next prev parent reply other threads:[~2022-06-16 2:44 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-14 9:10 [PATCH] clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parent AngeloGioacchino Del Regno
2022-06-16 2:44 ` Stephen Boyd [this message]
2022-06-16 8:48 ` AngeloGioacchino Del Regno
2022-06-17 0:11 ` Stephen Boyd
2022-06-16 7:12 ` Rex-BC Chen
2022-06-16 8:51 ` AngeloGioacchino Del Regno
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