From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: dave.hansen@intel.com, len.brown@intel.com, tony.luck@intel.com,
rafael.j.wysocki@intel.com, reinette.chatre@intel.com,
dan.j.williams@intel.com
Cc: corbet@lwn.net, pbonzini@redhat.com, kvm@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
chang.seok.bae@intel.com
Subject: [PATCH 2/2] Documentation/x86: Explain guest XSTATE permission control
Date: Thu, 16 Jun 2022 14:22:10 -0700 [thread overview]
Message-ID: <20220616212210.3182-3-chang.seok.bae@intel.com> (raw)
In-Reply-To: <20220616212210.3182-1-chang.seok.bae@intel.com>
Commit 980fe2fddcff ("x86/fpu: Extend fpu_xstate_prctl() with guest
permissions") extends a couple of arch_prctl(2) options for VCPU threads.
Add description for them.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Reviewed-by: Yang Zhong <yang.zhong@intel.com>
Cc: kvm@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
Documentation/x86/xstate.rst | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Documentation/x86/xstate.rst b/Documentation/x86/xstate.rst
index 9597e6caa30e..55cbce580853 100644
--- a/Documentation/x86/xstate.rst
+++ b/Documentation/x86/xstate.rst
@@ -64,6 +64,27 @@ the handler allocates a larger xstate buffer for the task so the large
state can be context switched. In the unlikely cases that the allocation
fails, the kernel sends SIGSEGV.
+In addition, a couple of extended options are provided for a VCPU thread.
+The VCPU XSTATE permission is separately controlled.
+
+-ARCH_GET_XCOMP_GUEST_PERM
+
+ arch_prctl(ARCH_GET_XCOMP_GUEST_PERM, &features);
+
+ ARCH_GET_XCOMP_GUEST_PERM is a variant of ARCH_GET_XCOMP_PERM. So it
+ provides the same semantics and functionality but for VCPU.
+
+-ARCH_REQ_XCOMP_GUEST_PERM
+
+ arch_prctl(ARCH_REQ_XCOMP_GUEST_PERM, feature_nr);
+
+ ARCH_REQ_XCOMP_GUEST_PERM is a variant of ARCH_REQ_XCOMP_PERM. Like the
+ above, it has the same semantics for VCPU permission. It performs a
+ similar functionality but with a constraint. Permission is frozen when the
+ first VCPU is created. So any attempt to change permission after that
+ point is rejected. Thus, permission has to be requested before the first
+ VCPU creation.
+
AMX TILE_DATA enabling example
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
--
2.17.1
next prev parent reply other threads:[~2022-06-16 21:31 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-16 21:22 [PATCH 0/2] Documentation/x86: Update the dynamic XSTATE doc Chang S. Bae
2022-06-16 21:22 ` [PATCH 1/2] Documentation/x86: Add the AMX enabling example Chang S. Bae
2022-06-16 22:45 ` Dave Hansen
2022-06-17 21:35 ` Chang S. Bae
2022-08-24 4:33 ` Bagas Sanjaya
2022-06-16 21:22 ` Chang S. Bae [this message]
2022-06-16 22:49 ` [PATCH 2/2] Documentation/x86: Explain guest XSTATE permission control Dave Hansen
2022-06-23 23:55 ` Chang S. Bae
2022-08-23 23:34 ` Chang S. Bae
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