From: Ben Walker <benjamin.walker@intel.com>
To: vkoul@kernel.org
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v4 14/15] dmaengine: idxd: Support device_tx_status
Date: Wed, 22 Jun 2022 12:37:52 -0700 [thread overview]
Message-ID: <20220622193753.3044206-15-benjamin.walker@intel.com> (raw)
In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com>
This can now be supported even for devices that complete operations out
of order. Add support for directly polling transactions.
Signed-off-by: Ben Walker <benjamin.walker@intel.com>
---
drivers/dma/idxd/device.c | 1 +
drivers/dma/idxd/dma.c | 85 ++++++++++++++++++++++++++++++++++++++-
drivers/dma/idxd/idxd.h | 1 +
3 files changed, 85 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c
index ff0ea60051f0c..3c61eac0b05c7 100644
--- a/drivers/dma/idxd/device.c
+++ b/drivers/dma/idxd/device.c
@@ -148,6 +148,7 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq)
desc->iax_completion = &wq->iax_compls[i];
desc->compl_dma = wq->compls_addr + idxd->data->compl_size * i;
desc->id = i;
+ desc->gen = 1;
desc->wq = wq;
desc->cpu = -1;
}
diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c
index e0874cb4721c8..dda5342d273f4 100644
--- a/drivers/dma/idxd/dma.c
+++ b/drivers/dma/idxd/dma.c
@@ -12,6 +12,23 @@
#include "registers.h"
#include "idxd.h"
+
+#define DMA_COOKIE_BITS (sizeof(dma_cookie_t) * 8)
+/*
+ * The descriptor id takes the lower 16 bits of the cookie.
+ */
+#define DESC_ID_BITS 16
+#define DESC_ID_MASK ((1 << DESC_ID_BITS) - 1)
+/*
+ * The 'generation' is in the upper half of the cookie. But dma_cookie_t
+ * is signed, so we leave the upper-most bit for the sign. Further, we
+ * need to flag whether a cookie corresponds to an operation that is
+ * being completed via interrupt to avoid polling it, which takes
+ * the second most upper bit. So we subtract two bits from the upper half.
+ */
+#define DESC_GEN_MAX ((1 << (DMA_COOKIE_BITS - DESC_ID_BITS - 2)) - 1)
+#define DESC_INTERRUPT_FLAG (1 << (DMA_COOKIE_BITS - 2))
+
static inline struct idxd_wq *to_idxd_wq(struct dma_chan *c)
{
struct idxd_dma_chan *idxd_chan;
@@ -158,13 +175,67 @@ static void idxd_dma_free_chan_resources(struct dma_chan *chan)
idxd_wq_refcount(wq));
}
+
static enum dma_status idxd_dma_tx_status(struct dma_chan *dma_chan,
dma_cookie_t cookie,
struct dma_tx_state *txstate)
{
- return DMA_OUT_OF_ORDER;
+ u8 status;
+ struct idxd_wq *wq;
+ struct idxd_desc *desc;
+ u32 idx;
+
+ memset(txstate, 0, sizeof(*txstate));
+
+ if (dma_submit_error(cookie))
+ return DMA_ERROR;
+
+ wq = to_idxd_wq(dma_chan);
+
+ idx = cookie & DESC_ID_MASK;
+ if (idx >= wq->num_descs)
+ return DMA_ERROR;
+
+ desc = wq->descs[idx];
+
+ if (desc->txd.cookie != cookie) {
+ /*
+ * The user asked about an old transaction
+ */
+ return DMA_COMPLETE;
+ }
+
+ /*
+ * For descriptors completed via interrupt, we can't go
+ * look at the completion status directly because it races
+ * with the IRQ handler recyling the descriptor. However,
+ * since in this case we can rely on the interrupt handler
+ * to invalidate the cookie when the command completes we
+ * know that if we get here, the command is still in
+ * progress.
+ */
+ if ((cookie & DESC_INTERRUPT_FLAG) != 0)
+ return DMA_IN_PROGRESS;
+
+ status = desc->completion->status & DSA_COMP_STATUS_MASK;
+
+ if (status) {
+ /*
+ * Check against the original status as ABORT is software defined
+ * and 0xff, which DSA_COMP_STATUS_MASK can mask out.
+ */
+ if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT))
+ idxd_dma_complete_txd(desc, IDXD_COMPLETE_ABORT, true);
+ else
+ idxd_dma_complete_txd(desc, IDXD_COMPLETE_NORMAL, true);
+
+ return DMA_COMPLETE;
+ }
+
+ return DMA_IN_PROGRESS;
}
+
/*
* issue_pending() does not need to do anything since tx_submit() does the job
* already.
@@ -181,7 +252,17 @@ static dma_cookie_t idxd_dma_tx_submit(struct dma_async_tx_descriptor *tx)
int rc;
struct idxd_desc *desc = container_of(tx, struct idxd_desc, txd);
- cookie = dma_cookie_assign(tx);
+ cookie = (desc->gen << DESC_ID_BITS) | (desc->id & DESC_ID_MASK);
+
+ if ((desc->hw->flags & IDXD_OP_FLAG_RCI) != 0)
+ cookie |= DESC_INTERRUPT_FLAG;
+
+ if (desc->gen == DESC_GEN_MAX)
+ desc->gen = 1;
+ else
+ desc->gen++;
+
+ tx->cookie = cookie;
rc = idxd_submit_desc(wq, desc);
if (rc < 0) {
diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h
index bd93ada32c89d..d4f0227895075 100644
--- a/drivers/dma/idxd/idxd.h
+++ b/drivers/dma/idxd/idxd.h
@@ -326,6 +326,7 @@ struct idxd_desc {
struct llist_node llnode;
struct list_head list;
u16 id;
+ u16 gen;
int cpu;
struct idxd_wq *wq;
};
--
2.35.1
next prev parent reply other threads:[~2022-06-22 19:39 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20220503200728.2321188-1-benjamin.walker@intel.com>
2022-06-22 19:37 ` [PATCH v4 00/15] dmaengine: Support polling for out of order completions Ben Walker
2022-06-22 19:37 ` [PATCH v4 01/15] dmaengine: Remove dma_async_is_complete from client API Ben Walker
2022-06-22 19:37 ` [PATCH v4 02/15] dmaengine: Move dma_set_tx_state to the provider API header Ben Walker
2022-06-22 19:37 ` [PATCH v4 03/15] dmaengine: Add dmaengine_async_is_tx_complete Ben Walker
2022-06-22 19:37 ` [PATCH v4 04/15] crypto: stm32/hash: Use dmaengine_async_is_tx_complete Ben Walker
2022-06-22 19:37 ` [PATCH v4 05/15] media: omap_vout: " Ben Walker
2022-06-22 19:37 ` [PATCH v4 06/15] rapidio: " Ben Walker
2022-06-22 19:37 ` [PATCH v4 07/15] media: pxa_camera: " Ben Walker
2022-06-22 19:37 ` [PATCH v4 08/15] dmaengine: Remove dma_async_is_tx_complete Ben Walker
2022-06-22 19:37 ` [PATCH v4 09/15] dmaengine: Remove last, used from dma_tx_state Ben Walker
2022-06-22 19:37 ` [PATCH v4 10/15] dmaengine: Providers should prefer dma_set_residue over dma_set_tx_state Ben Walker
2022-06-22 19:37 ` [PATCH v4 11/15] dmaengine: Remove dma_set_tx_state Ben Walker
2022-06-22 19:37 ` [PATCH v4 12/15] dmaengine: Add provider documentation on cookie assignment Ben Walker
2022-06-22 19:37 ` [PATCH v4 13/15] dmaengine: idxd: idxd_desc.id is now a u16 Ben Walker
2022-06-22 19:37 ` Ben Walker [this message]
2022-06-22 19:37 ` [PATCH v4 15/15] dmaengine: Revert "cookie bypass for out of order completion" Ben Walker
2022-06-27 6:29 ` [PATCH v4 00/15] dmaengine: Support polling for out of order completions Vinod Koul
2022-08-29 20:35 ` [PATCH v5 0/7] " Ben Walker
2022-08-29 20:35 ` [PATCH v5 1/7] dmaengine: Remove dma_async_is_complete from client API Ben Walker
2022-08-29 20:35 ` [PATCH v5 2/7] dmaengine: Move dma_set_tx_state to the provider API header Ben Walker
2022-08-29 20:35 ` [PATCH v5 3/7] dmaengine: Add dmaengine_async_is_tx_complete Ben Walker
2022-10-19 16:31 ` Vinod Koul
2022-10-19 17:08 ` Walker, Benjamin
2022-08-29 20:35 ` [PATCH v5 4/7] dmaengine: Add provider documentation on cookie assignment Ben Walker
2022-10-19 16:34 ` Vinod Koul
2022-10-19 17:21 ` Walker, Benjamin
2022-10-20 4:12 ` Vinod Koul
2022-10-21 17:33 ` Walker, Benjamin
2022-08-29 20:35 ` [PATCH v5 5/7] dmaengine: idxd: idxd_desc.id is now a u16 Ben Walker
2022-08-29 20:35 ` [PATCH v5 6/7] dmaengine: idxd: Support device_tx_status Ben Walker
2022-09-01 17:24 ` Dave Jiang
2022-08-29 20:35 ` [PATCH v5 7/7] dmaengine: Revert "cookie bypass for out of order completion" Ben Walker
2022-09-01 17:25 ` [PATCH v5 0/7] dmaengine: Support polling for out of order completions Dave Jiang
2022-10-28 20:48 ` [PATCH v6 " Ben Walker
2022-10-28 20:48 ` [PATCH v6 1/7] dmaengine: Remove dma_async_is_complete from client API Ben Walker
2022-10-28 20:48 ` [PATCH v6 2/7] dmaengine: Move dma_set_tx_state to the provider API header Ben Walker
2022-10-28 20:48 ` [PATCH v6 3/7] dmaengine: Add dmaengine_is_tx_complete Ben Walker
2022-10-28 20:48 ` [PATCH v6 4/7] dmaengine: Add provider documentation on cookie assignment Ben Walker
2022-10-28 20:48 ` [PATCH v6 5/7] dmaengine: idxd: idxd_desc.id is now a u16 Ben Walker
2022-10-28 20:48 ` [PATCH v6 6/7] dmaengine: idxd: Support device_tx_status Ben Walker
2022-10-28 20:48 ` [PATCH v6 7/7] dmaengine: Revert "cookie bypass for out of order completion" Ben Walker
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