From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: <ira.weiny@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Ben Widawsky <bwidawsk@kernel.org>,
Alison Schofield <alison.schofield@intel.com>,
Lukas Wunner <lukas@wunner.de>,
Vishal Verma <vishal.l.verma@intel.com>,
Dave Jiang <dave.jiang@intel.com>, <linux-kernel@vger.kernel.org>,
<linux-cxl@vger.kernel.org>, <linux-pci@vger.kernel.org>
Subject: Re: [PATCH V12 8/9] cxl/port: Retry reading CDAT on failure
Date: Tue, 28 Jun 2022 15:57:20 +0100 [thread overview]
Message-ID: <20220628155720.000034cb@Huawei.com> (raw)
In-Reply-To: <20220628041527.742333-9-ira.weiny@intel.com>
On Mon, 27 Jun 2022 21:15:26 -0700
ira.weiny@intel.com wrote:
> From: Ira Weiny <ira.weiny@intel.com>
>
> The CDAT read may fail for a number of reasons but mainly it is possible
> to get different parts of a valid state. The checksum in the CDAT table
> protects against this.
>
> Now that the cdat data is validated, issue a retry if the CDAT read
> fails. For now 5 retries are implemented.
>
> Reviewed-by: Ben Widawsky <bwidawsk@kernel.org>
> Reviewed-by: Alison Schofield <alison.schofield@intel.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
>
> ---
> Changes from V10
> Pick up review tag and fix commit message
>
> Changes from V9
> Alison Schofield/Davidlohr Bueso
> Print debug on each iteration and error only after failure
>
> Changes from V8
> Move code to cxl/core/pci.c
>
> Changes from V6
> Move to pci.c
> Fix retries count
> Change to 5 retries
>
> Changes from V5:
> New patch -- easy to push off or drop.
> ---
> drivers/cxl/core/pci.c | 41 ++++++++++++++++++++++++++++++-----------
> 1 file changed, 30 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
> index 6d775cc3dca1..d7c2a415cc5f 100644
> --- a/drivers/cxl/core/pci.c
> +++ b/drivers/cxl/core/pci.c
> @@ -618,36 +618,30 @@ static int cxl_cdat_read_table(struct device *dev,
> return rc;
> }
>
> -/**
> - * read_cdat_data - Read the CDAT data on this port
> - * @port: Port to read data from
> - *
> - * This call will sleep waiting for responses from the DOE mailbox.
> - */
> -void read_cdat_data(struct cxl_port *port)
> +static int __read_cdat_data(struct cxl_port *port)
> {
> static struct pci_doe_mb *cdat_mb;
> struct device *dev = &port->dev;
> struct device *uport = port->uport;
> size_t cdat_length;
> - int ret;
> + int ret = 0;
Fairly sure there isn't a path in which ret isn't set...
Mixing ret and rc is a bit inconsistent, maybe scrub patch set for
one or the other. (My fault originally I think :)
>
> cdat_mb = find_cdat_mb(uport);
> if (!cdat_mb) {
> dev_dbg(dev, "No CDAT mailbox\n");
> - return;
> + return -EIO;
> }
>
> port->cdat_sup = true;
>
> if (cxl_cdat_get_length(dev, cdat_mb, &cdat_length)) {
> dev_dbg(dev, "No CDAT length\n");
> - return;
> + return -EIO;
> }
>
> port->cdat.table = devm_kzalloc(dev, cdat_length, GFP_KERNEL);
> if (!port->cdat.table)
> - return;
> + return -ENOMEM;
>
> port->cdat.length = cdat_length;
> ret = cxl_cdat_read_table(dev, cdat_mb, &port->cdat);
> @@ -658,5 +652,30 @@ void read_cdat_data(struct cxl_port *port)
> port->cdat.length = 0;
> dev_err(dev, "CDAT data read error\n");
> }
> +
> + return ret;
> +}
> +
> +/**
> + * read_cdat_data - Read the CDAT data on this port
> + * @port: Port to read data from
> + *
> + * This call will sleep waiting for responses from the DOE mailbox.
> + */
> +void read_cdat_data(struct cxl_port *port)
> +{
> + int retries = 5;
> + int rc;
> +
> + while (retries--) {
> + rc = __read_cdat_data(port);
> + if (!rc)
> + return;
> + dev_dbg(&port->dev,
> + "CDAT data read error rc=%d (retries %d)\n",
> + rc, retries);
> + }
> + dev_err(&port->dev, "CDAT data read failed after %d retries\n",
> + retries);
> }
> EXPORT_SYMBOL_NS_GPL(read_cdat_data, CXL);
next prev parent reply other threads:[~2022-06-28 14:57 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-28 4:15 [PATCH V12 0/9] CXL: Read CDAT and DSMAS data ira.weiny
2022-06-28 4:15 ` [PATCH V12 1/9] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-06-28 4:15 ` [PATCH V12 2/9] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-06-28 4:15 ` [PATCH V12 3/9] PCI: Create PCIe library functions in support of DOE mailboxes ira.weiny
2022-06-28 14:16 ` Jonathan Cameron
2022-06-28 14:56 ` Bjorn Helgaas
2022-06-28 18:20 ` Ira Weiny
2022-06-29 14:09 ` Jonathan Cameron
2022-06-30 4:34 ` Ira Weiny
2022-06-30 15:25 ` Jonathan Cameron
2022-07-01 22:22 ` Ira Weiny
2022-07-04 6:45 ` Jonathan Cameron
2022-06-29 16:53 ` Ira Weiny
2022-06-28 14:38 ` Jonathan Cameron
2022-06-28 16:58 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 4/9] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-06-28 14:33 ` Jonathan Cameron
2022-06-30 5:32 ` Ira Weiny
2022-06-30 15:32 ` Jonathan Cameron
2022-06-30 16:14 ` Davidlohr Bueso
2022-07-01 19:52 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 5/9] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} ira.weiny
2022-06-28 6:06 ` Greg Kroah-Hartman
2022-06-28 16:42 ` Ira Weiny
2022-06-29 1:10 ` Bjorn Helgaas
2022-06-28 4:15 ` [PATCH V12 6/9] cxl/port: Read CDAT table ira.weiny
2022-06-28 14:47 ` Jonathan Cameron
2022-06-30 3:35 ` Ira Weiny
2022-06-30 15:45 ` Jonathan Cameron
2022-06-28 4:15 ` [PATCH V12 7/9] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-06-28 14:49 ` Jonathan Cameron
2022-06-30 4:42 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 8/9] cxl/port: Retry reading CDAT on failure ira.weiny
2022-06-28 14:57 ` Jonathan Cameron [this message]
2022-06-30 3:40 ` Ira Weiny
2022-06-28 4:15 ` [PATCH V12 9/9] cxl/port: Parse out DSMAS data from CDAT table ira.weiny
2022-06-28 15:00 ` Jonathan Cameron
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