[PATCH v1 00/14] PolarFire SoC reset controller & clock cleanups

Conor Dooley
2022-06-30T08:08:20Z

Hey all,
I know I have not sat on the RFC I sent about the aux. bus parts
for too long, but figured I'd just send the whole thing anyway to all
lists etc.

Kinda two things happening in this series, but I sent it together to
ensure the second part would apply correctly.

The first is the reset controller that I promised after discovering the
issue triggered by CONFIG_PM & the phy not coming up correctly. I have
now removed all the messing with resets from clock enable/disable
functions & now use the aux bus to set up a reset controller driver.
Since I needed something to test it, I hooked up the reset for the
Cadence MACB on PolarFire SoC.

The second part adds rate control for the MSS PLL clock, followed by
some simplifications to the driver & conversions of some custom structs
to the corresponding structs in the framework.

Thanks,
Conor.

FYI, there'll be maintainers conflicts with an obvious resolution in
-next, but I cannot rebase on then b/c unrelated changes have broken
boot there at the moment.

Conor Dooley (14):
dt-bindings: clk: microchip: mpfs: add reset controller support
dt-bindings: net: cdns,macb: document polarfire soc's macb
clk: microchip: mpfs: add reset controller
reset: add polarfire soc reset support
MAINTAINERS: add polarfire soc reset controller
net: macb: add polarfire soc reset support
riscv: dts: microchip: add mpfs specific macb reset support
clk: microchip: mpfs: add module_authors entries
clk: microchip: mpfs: add MSS pll's set & round rate
clk: microchip: mpfs: move id & offset out of clock structs
clk: microchip: mpfs: simplify control reg access
clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()
clk: microchip: mpfs: convert cfg_clk to clk_divider
clk: microchip: mpfs: convert periph_clk to clk_gate

.../bindings/clock/microchip,mpfs.yaml | 17 +-
.../devicetree/bindings/net/cdns,macb.yaml | 1 +
MAINTAINERS | 1 +
arch/riscv/boot/dts/microchip/mpfs.dtsi | 7 +-
drivers/clk/microchip/Kconfig | 1 +
drivers/clk/microchip/clk-mpfs.c | 377 +++++++++---------
drivers/net/ethernet/cadence/macb_main.c | 25 +-
drivers/reset/Kconfig | 9 +
drivers/reset/Makefile | 2 +-
drivers/reset/reset-mpfs.c | 145 +++++++
include/soc/microchip/mpfs.h | 8 +
11 files changed, 393 insertions(+), 200 deletions(-)
create mode 100644 drivers/reset/reset-mpfs.c

base-commit: b13baccc3850ca8b8cccbf8ed9912dbaa0fdf7f3
--
2.36.1