From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
Borislav Petkov <bp@suse.de>,
Josh Poimboeuf <jpoimboe@kernel.org>,
Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Subject: [PATCH 5.18 14/61] x86,static_call: Use alternative RET encoding
Date: Tue, 12 Jul 2022 20:39:11 +0200 [thread overview]
Message-ID: <20220712183237.514528907@linuxfoundation.org> (raw)
In-Reply-To: <20220712183236.931648980@linuxfoundation.org>
From: Peter Zijlstra <peterz@infradead.org>
commit ee88d363d15617ff50ac24fab0ffec11113b2aeb upstream.
In addition to teaching static_call about the new way to spell 'RET',
there is an added complication in that static_call() is allowed to
rewrite text before it is known which particular spelling is required.
In order to deal with this; have a static_call specific fixup in the
apply_return() 'alternative' patching routine that will rewrite the
static_call trampoline to match the definite sequence.
This in turn creates the problem of uniquely identifying static call
trampolines. Currently trampolines are 8 bytes, the first 5 being the
jmp.d32/ret sequence and the final 3 a byte sequence that spells out
'SCT'.
This sequence is used in __static_call_validate() to ensure it is
patching a trampoline and not a random other jmp.d32. That is,
false-positives shouldn't be plenty, but aren't a big concern.
OTOH the new __static_call_fixup() must not have false-positives, and
'SCT' decodes to the somewhat weird but semi plausible sequence:
push %rbx
rex.XB push %r12
Additionally, there are SLS concerns with immediate jumps. Combined it
seems like a good moment to change the signature to a single 3 byte
trap instruction that is unique to this usage and will not ever get
generated by accident.
As such, change the signature to: '0x0f, 0xb9, 0xcc', which decodes
to:
ud1 %esp, %ecx
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
arch/x86/include/asm/static_call.h | 19 ++++++++++++++++-
arch/x86/kernel/alternative.c | 12 +++++++----
arch/x86/kernel/static_call.c | 40 +++++++++++++++++++++++++++++++++++--
3 files changed, 64 insertions(+), 7 deletions(-)
--- a/arch/x86/include/asm/static_call.h
+++ b/arch/x86/include/asm/static_call.h
@@ -21,6 +21,16 @@
* relative displacement across sections.
*/
+/*
+ * The trampoline is 8 bytes and of the general form:
+ *
+ * jmp.d32 \func
+ * ud1 %esp, %ecx
+ *
+ * That trailing #UD provides both a speculation stop and serves as a unique
+ * 3 byte signature identifying static call trampolines. Also see tramp_ud[]
+ * and __static_call_fixup().
+ */
#define __ARCH_DEFINE_STATIC_CALL_TRAMP(name, insns) \
asm(".pushsection .static_call.text, \"ax\" \n" \
".align 4 \n" \
@@ -28,7 +38,7 @@
STATIC_CALL_TRAMP_STR(name) ": \n" \
ANNOTATE_NOENDBR \
insns " \n" \
- ".byte 0x53, 0x43, 0x54 \n" \
+ ".byte 0x0f, 0xb9, 0xcc \n" \
".type " STATIC_CALL_TRAMP_STR(name) ", @function \n" \
".size " STATIC_CALL_TRAMP_STR(name) ", . - " STATIC_CALL_TRAMP_STR(name) " \n" \
".popsection \n")
@@ -36,8 +46,13 @@
#define ARCH_DEFINE_STATIC_CALL_TRAMP(name, func) \
__ARCH_DEFINE_STATIC_CALL_TRAMP(name, ".byte 0xe9; .long " #func " - (. + 4)")
+#ifdef CONFIG_RETPOLINE
+#define ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) \
+ __ARCH_DEFINE_STATIC_CALL_TRAMP(name, "jmp __x86_return_thunk")
+#else
#define ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) \
__ARCH_DEFINE_STATIC_CALL_TRAMP(name, "ret; int3; nop; nop; nop")
+#endif
#define ARCH_DEFINE_STATIC_CALL_RET0_TRAMP(name) \
ARCH_DEFINE_STATIC_CALL_TRAMP(name, __static_call_return0)
@@ -48,4 +63,6 @@
".long " STATIC_CALL_KEY_STR(name) " - . \n" \
".popsection \n")
+extern bool __static_call_fixup(void *tramp, u8 op, void *dest);
+
#endif /* _ASM_STATIC_CALL_H */
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -539,18 +539,22 @@ void __init_or_module noinline apply_ret
s32 *s;
for (s = start; s < end; s++) {
- void *addr = (void *)s + *s;
+ void *dest = NULL, *addr = (void *)s + *s;
struct insn insn;
int len, ret;
u8 bytes[16];
- u8 op1;
+ u8 op;
ret = insn_decode_kernel(&insn, addr);
if (WARN_ON_ONCE(ret < 0))
continue;
- op1 = insn.opcode.bytes[0];
- if (WARN_ON_ONCE(op1 != JMP32_INSN_OPCODE))
+ op = insn.opcode.bytes[0];
+ if (op == JMP32_INSN_OPCODE)
+ dest = addr + insn.length + insn.immediate.value;
+
+ if (__static_call_fixup(addr, op, dest) ||
+ WARN_ON_ONCE(dest != &__x86_return_thunk))
continue;
DPRINTK("return thunk at: %pS (%px) len: %d to: %pS",
--- a/arch/x86/kernel/static_call.c
+++ b/arch/x86/kernel/static_call.c
@@ -12,6 +12,13 @@ enum insn_type {
};
/*
+ * ud1 %esp, %ecx - a 3 byte #UD that is unique to trampolines, chosen such
+ * that there is no false-positive trampoline identification while also being a
+ * speculation stop.
+ */
+static const u8 tramp_ud[] = { 0x0f, 0xb9, 0xcc };
+
+/*
* cs cs cs xorl %eax, %eax - a single 5 byte instruction that clears %[er]ax
*/
static const u8 xor5rax[] = { 0x2e, 0x2e, 0x2e, 0x31, 0xc0 };
@@ -43,7 +50,10 @@ static void __ref __static_call_transfor
break;
case RET:
- code = &retinsn;
+ if (cpu_feature_enabled(X86_FEATURE_RETHUNK))
+ code = text_gen_insn(JMP32_INSN_OPCODE, insn, &__x86_return_thunk);
+ else
+ code = &retinsn;
break;
}
@@ -60,7 +70,7 @@ static void __static_call_validate(void
{
u8 opcode = *(u8 *)insn;
- if (tramp && memcmp(insn+5, "SCT", 3)) {
+ if (tramp && memcmp(insn+5, tramp_ud, 3)) {
pr_err("trampoline signature fail");
BUG();
}
@@ -115,3 +125,29 @@ void arch_static_call_transform(void *si
mutex_unlock(&text_mutex);
}
EXPORT_SYMBOL_GPL(arch_static_call_transform);
+
+#ifdef CONFIG_RETPOLINE
+/*
+ * This is called by apply_returns() to fix up static call trampolines,
+ * specifically ARCH_DEFINE_STATIC_CALL_NULL_TRAMP which is recorded as
+ * having a return trampoline.
+ *
+ * The problem is that static_call() is available before determining
+ * X86_FEATURE_RETHUNK and, by implication, running alternatives.
+ *
+ * This means that __static_call_transform() above can have overwritten the
+ * return trampoline and we now need to fix things up to be consistent.
+ */
+bool __static_call_fixup(void *tramp, u8 op, void *dest)
+{
+ if (memcmp(tramp+5, tramp_ud, 3)) {
+ /* Not a trampoline site, not our problem. */
+ return false;
+ }
+
+ if (op == RET_INSN_OPCODE || dest == &__x86_return_thunk)
+ __static_call_transform(tramp, RET, NULL);
+
+ return true;
+}
+#endif
next prev parent reply other threads:[~2022-07-12 19:12 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-12 18:38 [PATCH 5.18 00/61] 5.18.12-rc1 review Greg Kroah-Hartman
2022-07-12 18:38 ` [PATCH 5.18 01/61] x86/traps: Use pt_regs directly in fixup_bad_iret() Greg Kroah-Hartman
2022-07-12 18:38 ` [PATCH 5.18 02/61] x86/entry: Switch the stack after error_entry() returns Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 03/61] x86/entry: Move PUSH_AND_CLEAR_REGS out of error_entry() Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 04/61] x86/entry: Dont call error_entry() for XENPV Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 05/61] x86/entry: Remove skip_r11rcx Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 06/61] x86/kvm/vmx: Make noinstr clean Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 07/61] x86/cpufeatures: Move RETPOLINE flags to word 11 Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 08/61] x86/retpoline: Cleanup some #ifdefery Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 09/61] x86/retpoline: Swizzle retpoline thunk Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 10/61] x86/retpoline: Use -mfunction-return Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 11/61] x86: Undo return-thunk damage Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 12/61] x86,objtool: Create .return_sites Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 13/61] objtool: skip non-text sections when adding return-thunk sites Greg Kroah-Hartman
2022-07-12 18:39 ` Greg Kroah-Hartman [this message]
2022-07-12 18:39 ` [PATCH 5.18 15/61] x86/ftrace: Use alternative RET encoding Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 16/61] x86/bpf: " Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 17/61] x86/kvm: Fix SETcc emulation for return thunks Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 18/61] x86/vsyscall_emu/64: Dont use RET in vsyscall emulation Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 19/61] x86/sev: Avoid using __x86_return_thunk Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 20/61] x86: Use return-thunk in asm code Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 21/61] x86/entry: Avoid very early RET Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 22/61] objtool: Treat .text.__x86.* as noinstr Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 23/61] x86: Add magic AMD return-thunk Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 24/61] x86/bugs: Report AMD retbleed vulnerability Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 25/61] x86/bugs: Add AMD retbleed= boot parameter Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 26/61] x86/bugs: Enable STIBP for JMP2RET Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 27/61] x86/bugs: Keep a per-CPU IA32_SPEC_CTRL value Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 28/61] x86/entry: Add kernel IBRS implementation Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 29/61] x86/bugs: Optimize SPEC_CTRL MSR writes Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 30/61] x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 31/61] x86/bugs: Split spectre_v2_select_mitigation() and spectre_v2_user_select_mitigation() Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 32/61] x86/bugs: Report Intel retbleed vulnerability Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 33/61] intel_idle: Disable IBRS during long idle Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 34/61] objtool: Update Retpoline validation Greg Kroah-Hartman
2022-07-13 7:45 ` Jiri Slaby
2022-07-13 7:54 ` Jiri Slaby
2022-07-13 8:17 ` Greg Kroah-Hartman
2022-07-13 9:21 ` Borislav Petkov
2022-07-13 9:50 ` [PATCH] x86/asm/32: fix ANNOTATE_UNRET_SAFE use on 32bit Jiri Slaby
2022-07-13 10:45 ` [tip: x86/urgent] x86/asm/32: Fix ANNOTATE_UNRET_SAFE use on 32-bit tip-bot2 for Jiri Slaby
2022-07-13 10:52 ` tip-bot2 for Jiri Slaby
2022-07-12 18:39 ` [PATCH 5.18 35/61] x86/xen: Rename SYS* entry points Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 36/61] x86/xen: Add UNTRAIN_RET Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 37/61] x86/bugs: Add retbleed=ibpb Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 38/61] x86/bugs: Do IBPB fallback check only once Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 39/61] objtool: Add entry UNRET validation Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 40/61] x86/cpu/amd: Add Spectral Chicken Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 41/61] x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 42/61] x86/speculation: Fix firmware entry SPEC_CTRL handling Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 43/61] x86/speculation: Fix SPEC_CTRL write on SMT state change Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 44/61] x86/speculation: Use cached host SPEC_CTRL value for guest entry/exit Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 45/61] x86/speculation: Remove x86_spec_ctrl_mask Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 46/61] objtool: Re-add UNWIND_HINT_{SAVE_RESTORE} Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 47/61] KVM: VMX: Flatten __vmx_vcpu_run() Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 48/61] KVM: VMX: Convert launched argument to flags Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 49/61] KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 50/61] KVM: VMX: Fix IBRS handling after vmexit Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 51/61] x86/speculation: Fill RSB on vmexit for IBRS Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 52/61] KVM: VMX: Prevent RSB underflow before vmenter Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 53/61] x86/common: Stamp out the stepping madness Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 54/61] x86/cpu/amd: Enumerate BTC_NO Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 55/61] x86/retbleed: Add fine grained Kconfig knobs Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 56/61] x86/bugs: Add Cannon lake to RETBleed affected CPU list Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 57/61] x86/entry: Move PUSH_AND_CLEAR_REGS() back into error_entry Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 58/61] x86/bugs: Do not enable IBPB-on-entry when IBPB is not supported Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 59/61] x86/kexec: Disable RET on kexec Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 60/61] x86/speculation: Disable RRSBA behavior Greg Kroah-Hartman
2022-07-12 18:39 ` [PATCH 5.18 61/61] x86/static_call: Serialize __static_call_fixup() properly Greg Kroah-Hartman
2022-07-12 23:52 ` [PATCH 5.18 00/61] 5.18.12-rc1 review Florian Fainelli
2022-07-13 0:43 ` Zan Aziz
2022-07-13 3:16 ` Shuah Khan
2022-07-13 8:30 ` Bagas Sanjaya
2022-07-13 10:06 ` Sudip Mukherjee (Codethink)
2022-07-13 10:17 ` Ron Economos
2022-07-13 11:03 ` Naresh Kamboju
2022-07-13 13:03 ` Greg Kroah-Hartman
2022-07-13 13:58 ` Naresh Kamboju
2022-07-13 16:54 ` Thadeu Lima de Souza Cascardo
2022-07-13 14:12 ` Peter Zijlstra
2022-07-13 22:18 ` Guenter Roeck
2022-07-13 22:21 ` Rudi Heitbaum
2022-07-15 11:27 ` Greg Kroah-Hartman
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