From: ira.weiny@intel.com
To: Dan Williams <dan.j.williams@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: "Ira Weiny" <ira.weiny@intel.com>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Lukas Wunner" <lukas@wunner.de>,
"Alison Schofield" <alison.schofield@intel.com>,
"Vishal Verma" <vishal.l.verma@intel.com>,
"Dave Jiang" <dave.jiang@intel.com>,
"Ben Widawsky" <bwidawsk@kernel.org>,
linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: [PATCH V14 5/7] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW}
Date: Thu, 14 Jul 2022 20:04:22 -0700 [thread overview]
Message-ID: <20220715030424.462963-6-ira.weiny@intel.com> (raw)
In-Reply-To: <20220715030424.462963-1-ira.weiny@intel.com>
From: Ira Weiny <ira.weiny@intel.com>
Many binary attributes need to limit access to CAP_SYS_ADMIN only; ie
many binary attributes specify is_visible with 0400 or 0600.
Make setting the permissions of such attributes more explicit by
defining BIN_ATTR_ADMIN_{RO,RW}.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Suggested-by: Dan Williams <dan.j.williams@intel.com>
Suggested-by: Krzysztof Wilczyński <kw@linux.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes from V12:
Pick up review tag
Bjorn:
NOTE: this has a lot of similarities to
https://lore.kernel.org/all/20210416205856.3234481-7-kw@linux.com/
I'm not sure why that patch was not picked up. But I've
added Krzysztof as a suggested by if that is ok?
Changes from V11:
New Patch
---
include/linux/sysfs.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index e3f1e8ac1f85..fd3fe5c8c17f 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -235,6 +235,22 @@ struct bin_attribute bin_attr_##_name = __BIN_ATTR_WO(_name, _size)
#define BIN_ATTR_RW(_name, _size) \
struct bin_attribute bin_attr_##_name = __BIN_ATTR_RW(_name, _size)
+
+#define __BIN_ATTR_ADMIN_RO(_name, _size) { \
+ .attr = { .name = __stringify(_name), .mode = 0400 }, \
+ .read = _name##_read, \
+ .size = _size, \
+}
+
+#define __BIN_ATTR_ADMIN_RW(_name, _size) \
+ __BIN_ATTR(_name, 0600, _name##_read, _name##_write, _size)
+
+#define BIN_ATTR_ADMIN_RO(_name, _size) \
+struct bin_attribute bin_attr_##_name = __BIN_ATTR_ADMIN_RO(_name, _size)
+
+#define BIN_ATTR_ADMIN_RW(_name, _size) \
+struct bin_attribute bin_attr_##_name = __BIN_ATTR_ADMIN_RW(_name, _size)
+
struct sysfs_ops {
ssize_t (*show)(struct kobject *, struct attribute *, char *);
ssize_t (*store)(struct kobject *, struct attribute *, const char *, size_t);
--
2.35.3
next prev parent reply other threads:[~2022-07-15 3:05 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 3:04 [PATCH V14 0/7] CXL: Read CDAT ira.weiny
2022-07-15 3:04 ` [PATCH V14 1/7] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-07-15 3:04 ` [PATCH V14 2/7] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-07-15 3:04 ` [PATCH V14 3/7] PCI/DOE: Add DOE mailbox support functions ira.weiny
2022-07-19 16:35 ` Jonathan Cameron
2022-07-19 19:16 ` Ira Weiny
2022-07-19 19:50 ` Ira Weiny
2022-07-20 11:24 ` Jonathan Cameron
2022-07-15 3:04 ` [PATCH V14 4/7] cxl/pci: Create PCI DOE mailbox's for memory devices ira.weiny
2022-07-19 16:38 ` Jonathan Cameron
2022-07-15 3:04 ` ira.weiny [this message]
2022-07-19 16:39 ` [PATCH V14 5/7] driver-core: Introduce BIN_ATTR_ADMIN_{RO,RW} Jonathan Cameron
2022-07-15 3:04 ` [PATCH V14 6/7] cxl/port: Read CDAT table ira.weiny
2022-07-16 3:27 ` Dan Williams
2022-07-19 1:19 ` Dan Williams
2022-07-15 3:04 ` [PATCH V14 7/7] cxl/port: Introduce cxl_cdat_valid() ira.weiny
2022-07-16 2:26 ` Dan Williams
2022-07-19 16:47 ` Jonathan Cameron
2022-07-19 15:21 ` [PATCH V14 0/7] CXL: Read CDAT Jonathan Cameron
2022-07-19 19:23 ` Dan Williams
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