[PATCH 2/2] ARM: dts: qcom: ipq8064: pad addresses to 8 digit

[Christian Marangi <ansuelsmth@gmail.com>]

Pad reg addresses to 8 digit to make sorting easier.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index cf41d330c920..9405d6167b20 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -348,7 +348,7 @@ vsdcc_fixed: vsdcc-regulator {
 
 		rpm: rpm@108000 {
 			compatible = "qcom,rpm-ipq8064";
-			reg = <0x108000 0x1000>;
+			reg = <0x00108000 0x1000>;
 			qcom,ipc = <&l2cc 0x8 2>;
 
 			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
@@ -389,7 +389,7 @@ tsens_calib_backup: calib_backup@410 {
 
 		qcom_pinmux: pinmux@800000 {
 			compatible = "qcom,ipq8064-pinctrl";
-			reg = <0x800000 0x4000>;
+			reg = <0x00800000 0x4000>;
 
 			gpio-controller;
 			gpio-ranges = <&qcom_pinmux 0 0 69>;
@@ -571,7 +571,7 @@ IRQ_TYPE_EDGE_RISING)>,
 
 		l2cc: clock-controller@2011000 {
 			compatible = "qcom,kpss-gcc", "syscon";
-			reg = <0x2011000 0x1000>;
+			reg = <0x02011000 0x1000>;
 			clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
 			clock-names = "pll8_vote", "pxo";
 			clock-output-names = "acpu_l2_aux";
-- 
2.36.1