From: Anup Patel <apatel@ventanamicro.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Atish Patra <atishp@atishpatra.org>,
Samuel Holland <samuel@sholland.org>,
Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH 0/2] Improve CLOCK_EVT_FEAT_C3STOP feature setting
Date: Tue, 19 Jul 2022 11:17:27 +0530 [thread overview]
Message-ID: <20220719054729.2224766-1-apatel@ventanamicro.com> (raw)
This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP
feature based on RISC-V platform capabilities.
These patches can also be found in riscv_timer_dt_imp_v1 branch at:
https://github.com/avpatel/linux.git
Anup Patel (2):
dt-bindings: riscv: Add optional DT property riscv,timer-always-on
clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT
property
Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
drivers/clocksource/timer-riscv.c | 6 +++++-
2 files changed, 11 insertions(+), 1 deletion(-)
--
2.34.1
next reply other threads:[~2022-07-19 5:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-19 5:47 Anup Patel [this message]
2022-07-19 5:47 ` [PATCH 1/2] dt-bindings: riscv: Add optional DT property riscv,timer-always-on Anup Patel
2022-07-19 5:47 ` [PATCH 2/2] clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT property Anup Patel
2022-07-19 6:42 ` Samuel Holland
2022-07-21 9:45 ` Anup Patel
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