[PATCH 5.19 0685/1157] iio: dac: ad7293: Fix alignment for DMA safety

Greg Kroah-Hartman
2022-08-16T04:37:03Z

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

[ Upstream commit 8482468b30bdb16d4a764f995d7a63d94fa0cf40 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 0bb12606c05f ("iio:dac:ad7293: add support for AD7293")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Antoniu Miclaus <antoniu.miclaus@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-57-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/iio/dac/ad7293.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad7293.c b/drivers/iio/dac/ad7293.c
index 59a38ca4c3c7..06f05750d921 100644
--- a/drivers/iio/dac/ad7293.c
+++ b/drivers/iio/dac/ad7293.c
@@ -144,7 +144,7 @@ struct ad7293_state {
struct regulator *reg_avdd;
struct regulator *reg_vdrive;
u8 page_select;
- u8 data[3] ____cacheline_aligned;
+ u8 data[3] __aligned(IIO_DMA_MINALIGN);
};

static int ad7293_page_select(struct ad7293_state *st, unsigned int reg)
--
2.35.1