[PATCH 5.18 0230/1095] ARM: dts: qcom-msm8974: Fix up SDHCI nodes

Greg Kroah-Hartman
2022-08-15T20:43:18Z

From: Konrad Dybcio <konrad.dybcio@somainline.org>

[ Upstream commit 64cf62683b5398e46cf967c308be95685137626a ]

- Add missing labels (and remove their redefinition from klte)
- Commonize bus-width
- Add non-removable on sdhc_1, as it's supposed to have an eMMC on it

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220415115633.575010-7-konrad.dybcio@somainline.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts | 4 ++--
arch/arm/boot/dts/qcom-msm8974.dtsi | 13 ++++++++++---
2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
index 95ae30d06554..3ee2508b20fb 100644
--- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
@@ -534,7 +534,7 @@ te {
};
};

- sdhc_1: sdhci@f9824900 {
+ sdhci@f9824900 {
status = "okay";

vmmc-supply = <&pma8084_l20>;
@@ -547,7 +547,7 @@ sdhc_1: sdhci@f9824900 {
pinctrl-0 = <&sdhc1_pin_a>;
};

- sdhc_2: sdhci@f9864900 {
+ sdhci@f9864900 {
status = "okay";

max-frequency = <100000000>;
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 2d54d18310da..d8a1ba5b845c 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -742,7 +742,7 @@ blsp2_uart4: serial@f9960000 {
status = "disabled";
};

- sdhci@f9824900 {
+ sdhc_1: sdhci@f9824900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -753,10 +753,13 @@ sdhci@f9824900 {
<&gcc GCC_SDCC1_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ bus-width = <8>;
+ non-removable;
+
status = "disabled";
};

- sdhci@f9864900 {
+ sdhc_3: sdhci@f9864900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9864900 0x11c>, <0xf9864000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -767,10 +770,12 @@ sdhci@f9864900 {
<&gcc GCC_SDCC3_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ bus-width = <4>;
+
status = "disabled";
};

- sdhci@f98a4900 {
+ sdhc_2: sdhci@f98a4900 {
compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc_mem", "core_mem";
@@ -781,6 +786,8 @@ sdhci@f98a4900 {
<&gcc GCC_SDCC2_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ bus-width = <4>;
+
status = "disabled";
};

--
2.35.1