From: Alexander Couzens <lynxis@fe80.eu>
To: Sean Wang <sean.wang@mediatek.com>,
Landen Chao <Landen.Chao@mediatek.com>,
DENG Qingfang <dqfext@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Daniel Golle <daniel@makrotopia.org>,
netdev@vger.kernel.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, Alexander Couzens <lynxis@fe80.eu>
Subject: [PATCH 2/2] net: mt7531: ensure all MACs are powered down before reset
Date: Sat, 20 Aug 2022 23:37:07 +0200 [thread overview]
Message-ID: <20220820213707.46138-2-lynxis@fe80.eu> (raw)
In-Reply-To: <20220820213707.46138-1-lynxis@fe80.eu>
The datasheet [1] explicit describes it as requirement for a reset.
[1] MT7531 Reference Manual for Development Board rev 1.0, page 735
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
---
drivers/net/dsa/mt7530.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 95a57aeb466e..409d5c3d76ea 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2329,6 +2329,10 @@ mt7531_setup(struct dsa_switch *ds)
return -ENODEV;
}
+ /* all MACs must be forced link-down before sw reset */
+ for (i = 0; i < MT7530_NUM_PORTS; i++)
+ mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
+
/* Reset the switch through internal reset */
mt7530_write(priv, MT7530_SYS_CTRL,
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
--
2.35.1
next prev parent reply other threads:[~2022-08-20 22:00 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-20 21:37 [PATCH 1/2] net: mt7531: only do PLL once after the reset Alexander Couzens
2022-08-20 21:37 ` Alexander Couzens [this message]
2022-08-23 10:58 ` Paolo Abeni
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