From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7ADE1C04AA5 for ; Thu, 25 Aug 2022 01:35:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233060AbiHYBfa (ORCPT ); Wed, 24 Aug 2022 21:35:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232622AbiHYBfG (ORCPT ); Wed, 24 Aug 2022 21:35:06 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9079CC77; Wed, 24 Aug 2022 18:35:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 491A3B826E2; Thu, 25 Aug 2022 01:35:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1F2EAC433D6; Thu, 25 Aug 2022 01:35:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1661391302; bh=AfxeHYENXKeXG7Ysry6dHPJkfNRliR1orjZYCF16Zf4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Az6bM170p+2jHZMLEQ1uAljy/RkBx+YttFvYzEY1NlEUDs3QOpd6NuRfIXAJy9Blj mrrMDFGY24zLwYKWLnpy/TUYGnq0GrBvIS2312KUGoafZZZwiBEM33Do902CBtxVFF nIRDpOc0UVqF/ddCnjJSbGz1khluJTVFNTSEJUAvG5kRZloNH5udxP3DzkcH4om9bM d7+ant8f3lXNnm4oQDQbXNPnMQHrylFOwrNuTvyp0mKC7FwMNk2pLLJfV8mn4cvzS9 mWkJdgr++u5szEgCrE8PfKHtEnylKJDFoD2U6jAIP4fZkiKyeCm6PPN+6PluxNg28R hSkn4vCBtsNoQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Fudong Wang , Alvin Lee , Tom Chung , Daniel Wheeler , Alex Deucher , Sasha Levin , harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@linux.ie, daniel@ffwll.ch, Charlene.Liu@amd.com, Anson.Jacob@amd.com, oliver.logush@amd.com, isabbasso@riseup.net, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 5.19 10/38] drm/amd/display: clear optc underflow before turn off odm clock Date: Wed, 24 Aug 2022 21:33:33 -0400 Message-Id: <20220825013401.22096-10-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220825013401.22096-1-sashal@kernel.org> References: <20220825013401.22096-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Fudong Wang [ Upstream commit b2a93490201300a749ad261b5c5d05cb50179c44 ] [Why] After ODM clock off, optc underflow bit will be kept there always and clear not work. We need to clear that before clock off. [How] Clear that if have when clock off. Reviewed-by: Alvin Lee Acked-by: Tom Chung Signed-off-by: Fudong Wang Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c index b1671b00ce40..2349977b0abb 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c @@ -464,6 +464,11 @@ void optc1_enable_optc_clock(struct timing_generator *optc, bool enable) OTG_CLOCK_ON, 1, 1, 1000); } else { + + //last chance to clear underflow, otherwise, it will always there due to clock is off. + if (optc->funcs->is_optc_underflow_occurred(optc) == true) + optc->funcs->clear_optc_underflow(optc); + REG_UPDATE_2(OTG_CLOCK_CONTROL, OTG_CLOCK_GATE_DIS, 0, OTG_CLOCK_EN, 0); -- 2.35.1