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From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Cc: Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Anup Patel <apatel@ventanamicro.com>,
	Mayuresh Chitale <mchitale@ventanamicro.com>
Subject: [PATCH v2 1/4] RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt
Date: Tue, 30 Aug 2022 10:16:39 +0530	[thread overview]
Message-ID: <20220830044642.566769-2-apatel@ventanamicro.com> (raw)
In-Reply-To: <20220830044642.566769-1-apatel@ventanamicro.com>

Currently, all flavors of ioremap_xyz() function maps to the generic
ioremap() which means any ioremap_xyz() call will always map the
target memory as IO using _PAGE_IOREMAP page attributes. This breaks
ioremap_cache() and ioremap_wc() on systems with Svpbmt because memory
remapped using ioremap_cache() and ioremap_wc() will use _PAGE_IOREMAP
page attributes.

To address above (just like other architectures), we implement RISC-V
specific ioremap_cache() and ioremap_wc() which maps memory using page
attributes as defined by the Svpbmt specification.

Fixes: ff689fd21cb1 ("riscv: add RISC-V Svpbmt extension support")
Co-developed-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 arch/riscv/include/asm/io.h      | 10 ++++++++++
 arch/riscv/include/asm/pgtable.h |  2 ++
 2 files changed, 12 insertions(+)

diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index 69605a474270..07ac63999575 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -133,6 +133,16 @@ __io_writes_outs(outs, u64, q, __io_pbr(), __io_paw())
 #define outsq(addr, buffer, count) __outsq((void __iomem *)addr, buffer, count)
 #endif
 
+#ifdef CONFIG_MMU
+#define ioremap_wc(addr, size)		\
+	ioremap_prot((addr), (size), _PAGE_IOREMAP_WC)
+#endif
+
 #include <asm-generic/io.h>
 
+#ifdef CONFIG_MMU
+#define ioremap_cache(addr, size)	\
+	ioremap_prot((addr), (size), _PAGE_KERNEL)
+#endif
+
 #endif /* _ASM_RISCV_IO_H */
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 7ec936910a96..346b7c1a3eeb 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -182,6 +182,8 @@ extern struct pt_alloc_ops pt_ops __initdata;
 #define PAGE_TABLE		__pgprot(_PAGE_TABLE)
 
 #define _PAGE_IOREMAP	((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO)
+#define _PAGE_IOREMAP_WC	((_PAGE_KERNEL & ~_PAGE_MTMASK) | \
+				 _PAGE_NOCACHE)
 #define PAGE_KERNEL_IO		__pgprot(_PAGE_IOREMAP)
 
 extern pgd_t swapper_pg_dir[];
-- 
2.34.1


  reply	other threads:[~2022-08-30  4:47 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-30  4:46 [PATCH v2 0/4] Add PMEM support for RISC-V Anup Patel
2022-08-30  4:46 ` Anup Patel [this message]
2022-09-01 15:25   ` [PATCH v2 1/4] RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt Heiko Stübner
2022-09-01 16:07   ` Conor.Dooley
2022-09-09  8:10   ` Anup Patel
2022-09-16  2:24   ` Anup Patel
2022-09-22 16:35     ` Palmer Dabbelt
2022-09-23 10:35       ` Arnd Bergmann
2022-09-23 10:45         ` Palmer Dabbelt
2022-09-28 12:14       ` Christoph Hellwig
2022-10-07  3:50         ` Palmer Dabbelt
2022-10-07  5:34           ` Anup Patel
2022-08-30  4:46 ` [PATCH v2 2/4] RISC-V: Move riscv_init_cbom_blocksize() to cacheflush.c Anup Patel
2022-09-01 15:29   ` Heiko Stübner
2022-09-01 15:49     ` Conor.Dooley
2022-08-30  4:46 ` [PATCH v2 3/4] RISC-V: Implement arch specific PMEM APIs Anup Patel
2022-09-01 15:38   ` Heiko Stübner
2022-09-03 16:03     ` Anup Patel
2022-08-30  4:46 ` [PATCH v2 4/4] RISC-V: Enable PMEM drivers Anup Patel
2022-09-01 16:11   ` Conor.Dooley

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