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Tue, 30 Aug 2022 04:56:49 -0700 (PDT) Received: from thinkpad ([117.217.182.234]) by smtp.gmail.com with ESMTPSA id z124-20020a626582000000b00537e328bc11sm7313942pfb.31.2022.08.30.04.56.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Aug 2022 04:56:48 -0700 (PDT) Date: Tue, 30 Aug 2022 17:26:42 +0530 From: Manivannan Sadhasivam To: Krzysztof Kozlowski Cc: lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org, kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, konrad.dybcio@somainline.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org, dmitry.baryshkov@linaro.org Subject: Re: [PATCH 09/11] dt-bindings: PCI: qcom-ep: Define clocks per platform Message-ID: <20220830115642.GE135982@thinkpad> References: <20220826181923.251564-1-manivannan.sadhasivam@linaro.org> <20220826181923.251564-10-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Aug 28, 2022 at 06:20:21PM +0300, Krzysztof Kozlowski wrote: > On 26/08/2022 21:19, Manivannan Sadhasivam wrote: > > In preparation of adding the bindings for future SoCs, let's define the > > clocks per platform. > > > > Signed-off-by: Manivannan Sadhasivam > > --- > > .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 46 +++++++++++-------- > > 1 file changed, 27 insertions(+), 19 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > index b728ede3f09f..83a2cfc63bc1 100644 > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > > @@ -9,9 +9,6 @@ title: Qualcomm PCIe Endpoint Controller binding > > maintainers: > > - Manivannan Sadhasivam > > > > -allOf: > > - - $ref: "pci-ep.yaml#" > > - > > properties: > > compatible: > > const: qcom,sdx55-pcie-ep > > @@ -35,24 +32,12 @@ properties: > > - const: mmio > > > > clocks: > > - items: > > - - description: PCIe Auxiliary clock > > - - description: PCIe CFG AHB clock > > - - description: PCIe Master AXI clock > > - - description: PCIe Slave AXI clock > > - - description: PCIe Slave Q2A AXI clock > > - - description: PCIe Sleep clock > > - - description: PCIe Reference clock > > + minItems: 7 > > + maxItems: 7 > > > > clock-names: > > - items: > > - - const: aux > > - - const: cfg > > - - const: bus_master > > - - const: bus_slave > > - - const: slave_q2a > > - - const: sleep > > - - const: ref > > + minItems: 7 > > + maxItems: 7 > > > > qcom,perst-regs: > > description: Reference to a syscon representing TCSR followed by the two > > @@ -112,6 +97,29 @@ required: > > - reset-names > > - power-domains > > > > +allOf: > > + - $ref: "pci-ep.yaml#" > > + - if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - qcom,sdx55-pcie-ep > > + then: > > + properties: > > + clocks: > > + minItems: 7 > > + maxItems: 7 > > One more thing - the previous way of describing items is more readable > instead of names followed by a comment, so I propose to keep it. This > applies also to patch 10. > Okay. Thanks, Mani > Best regards, > Krzysztof -- மணிவண்ணன் சதாசிவம்