Re: [PATCH v1 03/17] pinctrl: cy8c95x0: Allow most of the registers to be cached

Andy Shevchenko
2022-09-02T18:42:41Z

On Fri, Sep 2, 2022 at 9:36 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
>
> It's unclear why many of static registers were marked as volatile.

the static (yeah, forgot it)

> They are pretty much bidirectional and static in a sense that
> written value is kept there until a new write or chip reset.
> Drop those registers from the list to allow them to be cached.

This patch is not correct due to indexing access. It's sneaked since I
forgot I added it into my main repo. The proper approach should be to
create virtual registers and decode them before use. This allows to
cache all ports and as a benefit to debug print all port actual
statuses.

--
With Best Regards,
Andy Shevchenko