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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, tglx@linutronix.de, mingo@redhat.com,
	bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com,
	avagin@gmail.com, chang.seok.bae@intel.com
Subject: [PATCH 0/4] x86/fpu: Fix MXCSR handling and SSE component definition
Date: Fri, 16 Sep 2022 13:11:54 -0700	[thread overview]
Message-ID: <20220916201158.8072-1-chang.seok.bae@intel.com> (raw)

Hi all,

Andrei's report [1] triggered reviewing the MXCSR-related code. My
responded change [2] has been revised along with some additional fixes in
this series.

While Dave Hansen alluded another version [3] for the fix, as I couldn't
locate it so far, sending patches as one of proposals in this regard.

== Regression ==

Recently the XSTATE copy functions were unitized together [4]. At a glance,
this change appears to relapse the ptrace write on the MXCSR state when
the non-compacted format is used in the kernel.

But, this regression appears to root in the XSAVES-enabling code [5] that
introduced the XSTATE conversion along with the MXCSR mistreatment.

== MXCSR Hindsight ==

MXCSR is architecturally part of the SSE component. The MXCSR association
of XSTATE_BV depends on the XSAVE format.

The change [5], however, presumed MXCSR as part of the X87 component and
made the kernel referencing XSTATE_BV regardless of the format.

== Patches ==

* Fix the MXCSR conversion code along with adding the test case.
* Then, fixing MXCSR, one of the other call sites is also updated to
  exclude legacy states.
* The hard-coded legacy state offset and size are adjusted in the end.

These patches can be also found in this repository:
  git://github.com/intel/amx-linux.git mxcsr

Thanks,
Chang

[1] https://lore.kernel.org/lkml/CANaxB-wkcNKWjyNGFuMn6f6H2DQSGwwQjUgg1eATdUgmM-Kg+A@mail.gmail.com/
[2] https://lore.kernel.org/lkml/37ba2de3-26b3-12eb-6a9d-c0f0572b832c@intel.com/
[3] https://lore.kernel.org/lkml/1660cdf4-96c1-b6bb-a3be-d02c7a3affb9@intel.com/
[4] Commit 43be46e89698 ("x86/fpu: Sanitize xstateregs_set()")
[5] Commit 91c3dba7dbc1 ("x86/fpu/xstate: Fix PTRACE frames for XSAVES")

Chang S. Bae (4):
  x86/fpu: Fix the MXCSR state reshuffling between userspace and kernel
    buffers
  selftests/x86/mxcsr: Test the MXCSR state write via ptrace
  x86/fpu: Clarify the XSTATE clearing only for extended components
  x86/fpu: Correct the legacy state offset and size information

 arch/x86/include/asm/fpu/api.h       |   2 +-
 arch/x86/kernel/fpu/xstate.c         |  98 +++++++++----
 arch/x86/kvm/x86.c                   |   4 +-
 tools/testing/selftests/x86/Makefile |   2 +-
 tools/testing/selftests/x86/mxcsr.c  | 200 +++++++++++++++++++++++++++
 5 files changed, 273 insertions(+), 33 deletions(-)
 create mode 100644 tools/testing/selftests/x86/mxcsr.c


base-commit: 82eedfedea446ae448f0975f1db7d1631cd24330
-- 
2.17.1


             reply	other threads:[~2022-09-16 20:22 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-16 20:11 Chang S. Bae [this message]
2022-09-16 20:11 ` [PATCH 1/4] x86/fpu: Fix the MXCSR state reshuffling between userspace and kernel buffers Chang S. Bae
2022-09-16 20:11 ` [PATCH 2/4] selftests/x86/mxcsr: Test the MXCSR state write via ptrace Chang S. Bae
2022-09-16 20:11 ` [PATCH 3/4] x86/fpu: Clarify the XSTATE clearing only for extended components Chang S. Bae
2022-09-17  0:25   ` Sean Christopherson
2022-09-16 20:11 ` [PATCH 4/4] x86/fpu: Correct the legacy state offset and size information Chang S. Bae

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