From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFED3ECAAD8 for ; Wed, 21 Sep 2022 08:28:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229677AbiIUI2c (ORCPT ); Wed, 21 Sep 2022 04:28:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230316AbiIUI2C (ORCPT ); Wed, 21 Sep 2022 04:28:02 -0400 Received: from maillog.nuvoton.com (maillog.nuvoton.com [202.39.227.15]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8B46D32AAF; Wed, 21 Sep 2022 01:27:54 -0700 (PDT) Received: from NTHCCAS01.nuvoton.com (NTHCCAS01.nuvoton.com [10.1.8.28]) by maillog.nuvoton.com (Postfix) with ESMTP id 430C71C80E70; Wed, 21 Sep 2022 16:27:53 +0800 (CST) Received: from NTHCCAS01.nuvoton.com (10.1.8.28) by NTHCCAS01.nuvoton.com (10.1.8.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.7; Wed, 21 Sep 2022 16:27:52 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS01.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2375.7 via Frontend Transport; Wed, 21 Sep 2022 16:27:52 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 825E262EFD; Wed, 21 Sep 2022 11:27:51 +0300 (IDT) From: Tomer Maimon To: , , , , , , , CC: , , , Tomer Maimon Subject: [PATCH v11 0/1] Introduce Nuvoton Arbel NPCM8XX BMC SoC Date: Wed, 21 Sep 2022 11:27:47 +0300 Message-ID: <20220921082749.80813-1-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset adds clock support for the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC family.   This patchset cover letter is based from the initial support for NPCM8xx BMC to keep tracking the version history.   all the other initial support patches had been applied to Linux kernel 6.0. This patchset was tested on the Arbel NPCM8XX evaluation board. Addressed comments from: - kernel test robot: https://lore.kernel.org/lkml/202209201539.wghiUnB8-lkp@intel.com/ Changes since version 10: - NPCM8XX clock driver - Fix const warning. Changes since version 9: - NPCM8XX clock driver - Move configuration place. - Using clk_parent_data instead of parent_name - using devm_ioremap instead of ioremap. deeply sorry, I know we had a long discussion on what should the driver use, from other examples (also in other clock drivers) I see the combination of platform_get_resource and devm_ioremap are commonly used and it answer the reset and clock needs. Changes since version 8: - NPCM8XX clock driver - Move configuration place. - Add space before and aftre '{' '}'. - Handle devm_of_clk_add_hw_provider function error. Changes since version 7: - NPCM8XX clock driver - The clock and reset registers using the same memory region, due to it the clock driver should claim the ioremap directly without checking the memory region. Changes since version 6: - NPCM reset driver - Modify warning message. - dt-bindings: serial: 8250: Add npcm845 compatible string patch accepted, due to it the patch removed from the patchset. Changes since version 5: - NPCM8XX clock driver - Remove refclk if devm_of_clk_add_hw_provider function failed. - NPCM8XX clock source driver - Remove NPCM8XX TIMER_OF_DECLARE support, using the same as NPCM7XX. Changes since version 4: - NPCM8XX clock driver - Use the same quote in the dt-binding file. Changes since version 3: - NPCM8XX clock driver - Rename NPCM8xx clock dt-binding header file. - Remove unused structures. - Improve Handling the clocks registration. - NPCM reset driver - Add ref phandle to dt-binding. Changes since version 2: - Remove NPCM8xx WDT compatible patch. - Remove NPCM8xx UART compatible patch. - NPCM8XX clock driver - Add debug new line. - Add 25M fixed rate clock. - Remove unused clocks and clock name from dt-binding. - NPCM reset driver - Revert to npcm7xx dt-binding. - Skip dt binding quotes. - Adding DTS backward compatibility. - Remove NPCM8xx binding include file. - Warp commit message. - NPCM8XX device tree: - Remove unused clock nodes (used in the clock driver) - Modify gcr and rst node names. Changes since version 1: - NPCM8XX clock driver - Modify dt-binding. - Remove unsed definition and include. - Include alphabetically. - Use clock devm. - NPCM reset driver - Modify dt-binding. - Modify syscon name. - Add syscon support to NPCM7XX dts reset node. - use data structure. - NPCM8XX device tree: - Modify evb compatible name. - Add NPCM7xx compatible. - Remove disable nodes from the EVB DTS. Tomer Maimon (1): clk: npcm8xx: add clock controller drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 1 + drivers/clk/clk-npcm8xx.c | 589 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 596 insertions(+) create mode 100644 drivers/clk/clk-npcm8xx.c -- 2.33.0