[djiang:cxl-security 1/19] include/linux/memregion.h:52:5: warning: no previous prototype for 'cpu_cache_invalidate_memregion'

[kernel test robot <lkp@intel.com>]

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/djiang/linux.git cxl-security
head:   3b2ea8468d5dbe2e7b61dcd86cc3aeadfe766d07
commit: d8fab77dd9512ae56e653afddbef9351da206679 [1/19] memregion: Add cpu_cache_invalidate_memregion() interface
config: parisc-allyesconfig (https://download.01.org/0day-ci/archive/20220921/202209211040.pEXdfJvU-lkp@intel.com/config)
compiler: hppa-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://git.kernel.org/pub/scm/linux/kernel/git/djiang/linux.git/commit/?id=d8fab77dd9512ae56e653afddbef9351da206679
        git remote add djiang https://git.kernel.org/pub/scm/linux/kernel/git/djiang/linux.git
        git fetch --no-tags djiang cxl-security
        git checkout d8fab77dd9512ae56e653afddbef9351da206679
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=parisc SHELL=/bin/bash drivers/cxl/core/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   In file included from drivers/cxl/core/port.c:4:
>> include/linux/memregion.h:52:5: warning: no previous prototype for 'cpu_cache_invalidate_memregion' [-Wmissing-prototypes]
      52 | int cpu_cache_invalidate_memregion(int res_desc)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


vim +/cpu_cache_invalidate_memregion +52 include/linux/memregion.h

    51	
  > 52	int cpu_cache_invalidate_memregion(int res_desc)

-- 
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