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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, tglx@linutronix.de, mingo@redhat.com,
	bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com,
	avagin@gmail.com, seanjc@google.com, chang.seok.bae@intel.com
Subject: [PATCH v2 0/4] x86/fpu: Fix MXCSR handling and SSE component definition
Date: Thu, 22 Sep 2022 13:00:30 -0700	[thread overview]
Message-ID: <20220922200034.23759-1-chang.seok.bae@intel.com> (raw)

Hi all,

Changes from v1:
* patch3: revert the function name change and add a warning. Then update
  the changelog and title.

Thanks Sean Christopherson for the feedback.

== Regression ==

Recently the XSTATE copy functions were unitized together [2]. At a glance,
this change appears to relapse the ptrace write on the MXCSR state when
the non-compacted format is used in the kernel.

But, this regression appears to root in the XSAVES-enabling code [3] that
introduced the XSTATE conversion along with the MXCSR mistreatment.

== MXCSR Hindsight ==

MXCSR is architecturally part of the SSE component. The MXCSR association
of XSTATE_BV depends on the XSAVE format.

The change [3], however, presumed MXCSR as part of the X87 component and
made the kernel referencing XSTATE_BV regardless of the format.

== Patches ==

* Fix the MXCSR conversion code along with adding the test case.
* Then, fixing MXCSR, one of the other call sites is also updated to
  exclude legacy states.
* The hard-coded legacy state offset and size are adjusted in the end.

These patches can be also found in this repository:
  git://github.com/intel/amx-linux.git mxcsr

Thanks,
Chang

[1] v1: https://lore.kernel.org/lkml/20220916201158.8072-1-chang.seok.bae@intel.com/
[2] Commit 43be46e89698 ("x86/fpu: Sanitize xstateregs_set()")
[3] Commit 91c3dba7dbc1 ("x86/fpu/xstate: Fix PTRACE frames for XSAVES")

Chang S. Bae (4):
  x86/fpu: Fix the MXCSR state reshuffling between userspace and kernel
    buffers
  selftests/x86/mxcsr: Test the MXCSR state write via ptrace
  x86/fpu: Disallow legacy states from fpstate_clear_xstate_component()
  x86/fpu: Correct the legacy state offset and size information

 arch/x86/kernel/fpu/xstate.c         | 100 ++++++++++----
 tools/testing/selftests/x86/Makefile |   2 +-
 tools/testing/selftests/x86/mxcsr.c  | 200 +++++++++++++++++++++++++++
 3 files changed, 274 insertions(+), 28 deletions(-)
 create mode 100644 tools/testing/selftests/x86/mxcsr.c


base-commit: 08ed00508bc1fa0a0bc6dd2420f982b55051de23
-- 
2.17.1


             reply	other threads:[~2022-09-22 20:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-22 20:00 Chang S. Bae [this message]
2022-09-22 20:00 ` [PATCH v2 1/4] x86/fpu: Fix the MXCSR state reshuffling between userspace and kernel buffers Chang S. Bae
2022-09-22 20:00 ` [PATCH v2 2/4] selftests/x86/mxcsr: Test the MXCSR state write via ptrace Chang S. Bae
2022-09-22 20:00 ` [PATCH v2 3/4] x86/fpu: Disallow legacy states from fpstate_clear_xstate_component() Chang S. Bae
2022-09-22 20:00 ` [PATCH v2 4/4] x86/fpu: Correct the legacy state offset and size information Chang S. Bae
2022-09-28 21:06   ` Sean Christopherson
2022-09-28 22:16     ` Chang S. Bae
2022-09-28 22:32       ` Sean Christopherson

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