[PATCH 5.19 080/207] arm64: dts: imx8ulp: add #reset-cells for pcc

Greg Kroah-Hartman
2022-09-26T12:06:39Z

From: Peng Fan <peng.fan@nxp.com>

[ Upstream commit 5fa383a25fd8a16a73485c90da4e3e33a78b45cf ]

The binding file clock/imx8ulp-pcc-clock.yaml indicates '#reset-cells'
is a required property, add it.

Fixes: fe6291e96313 ("arm64: dts: imx8ulp: Add the basic dtsi file for imx8ulp")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 09f7364dd1d0..1cd389b1b95d 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -172,6 +172,7 @@ pcc3: clock-controller@292d0000 {
compatible = "fsl,imx8ulp-pcc3";
reg = <0x292d0000 0x10000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};

tpm5: tpm@29340000 {
@@ -270,6 +271,7 @@ pcc4: clock-controller@29800000 {
compatible = "fsl,imx8ulp-pcc4";
reg = <0x29800000 0x10000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};

lpi2c6: i2c@29840000 {
@@ -414,6 +416,7 @@ pcc5: clock-controller@2da70000 {
compatible = "fsl,imx8ulp-pcc5";
reg = <0x2da70000 0x10000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
};

--
2.35.1