From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B166DC04A95 for ; Thu, 29 Sep 2022 00:32:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233676AbiI2AcV (ORCPT ); Wed, 28 Sep 2022 20:32:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231652AbiI2AcT (ORCPT ); Wed, 28 Sep 2022 20:32:19 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6318495AE6; Wed, 28 Sep 2022 17:32:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1A26DB82260; Thu, 29 Sep 2022 00:32:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C0221C433C1; Thu, 29 Sep 2022 00:32:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664411535; bh=IBKEGiblRpJ3fhBqxt2kaFHJ6u1oFa0nleCBfUtKjLo=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=NGxWz+EjeDeIPO//N47S3UPA7K3C9Nbw5ukc5iDp3A0MnUWVvTS/Ir8VOZvCq0CY/ CKMQmsIZrmYkM30lWzlgDeFm6hcu7cLUp04X3C9Td1LANaOD27MvK3bxH9xSDiDXzl yS8nl8Q73+gCd6KllS0Y00LHKAxES4ZhPojGuc8sPT3dnlWrzNHpjQMgu5ag271u8g HVYGqMQIfXQGYDbalSvjMDj+yLgPEGa8i4MJfL3QGGvChdGOrPa0Tj7+fg6koGh/iz f8dwsp097ugYjtoslUvEe8N9ZkmtdUbCR8LmYs3Vefji4wU428he9ySFsgS/A973Tp mLLnElISCJVjw== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20220929003030.0A61AC433D6@smtp.kernel.org> References: <20220909123123.2699583-1-conor.dooley@microchip.com> <20220909123123.2699583-2-conor.dooley@microchip.com> <20220929003030.0A61AC433D6@smtp.kernel.org> Subject: Re: [PATCH v5 01/14] clk: microchip: mpfs: fix clk_cfg array bounds violation From: Stephen Boyd Cc: Paul Walmsley , Albert Ou , Claudiu Beznea , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Nathan Chancellor To: Conor Dooley , Daire McNamara , Krzysztof Kozlowski , Michael Turquette , Palmer Dabbelt , Rob Herring Date: Wed, 28 Sep 2022 17:32:13 -0700 User-Agent: alot/0.10 Message-Id: <20220929003215.C0221C433C1@smtp.kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Stephen Boyd (2022-09-28 17:30:28) > Quoting Conor Dooley (2022-09-09 05:31:10) > > There is an array bounds violation present during clock registration, > > triggered by current code by only specific toolchains. This seems to > > fail gracefully in v6.0-rc1, using a toolchain build from the riscv- > > gnu-toolchain repo and with clang-15, and life carries on. While > > converting the driver to use standard clock structs/ops, kernel panics > > were seen during boot when built with clang-15: > >=20 > [...] > >=20 > > If parent is RTCREF, so the macro becomes: &mpfs_cfg_clks[33].cfg.hw > > which is well beyond the end of the array. Amazingly, builds with GCC > > 11.1 see no problem here, booting correctly and hooking the parent up > > etc. Builds with clang-15 do not, with the above panic. > >=20 > > Change the macro to use specific offsets depending on the parent rather > > than the dt-binding's clock IDs. > >=20 > > Fixes: 1c6a7ea32b8c ("clk: microchip: mpfs: add RTCREF clock control") > > CC: Nathan Chancellor > > Signed-off-by: Conor Dooley > > --- >=20 > I'll merge this patch over to clk-fixes as well. Great I see it's already split out and on fixes branch. Thanks!