Re: [PATCH 7/8] serial: 8250/ingenic: Add support for the JZ4750/JZ4755 SoCs

Paul Cercueil
2022-10-13T09:17:28Z

Hi,

Le jeu., oct. 13 2022 at 08:46:39 +0200, Arnd Bergmann <arnd@arndb.de>
a écrit :
> On Thu, Oct 13, 2022, at 8:37 AM, Siarhei Volkau wrote:
>> пн, 10 окт. 2022 г. в 01:29, kernel test robot
>> <lkp@intel.com>:
>>> config: ia64-allyesconfig
>>> config: arm64-randconfig-r035-20221010
>>
>>> > 142 #define CGU_REG_CPCCR ((void *)CKSEG1ADDR(0x10000000))
>>
>>> 0-DAY CI Kernel Test Service
>>
>> I know CKSEG1ADDR is MIPS specific, might be it needed to disable
>> COMPILE_TEST
>> on the driver?
>> Since early syscon isn't mainlined yet I don't see any other way at
>> the moment.
>>
>> Any suggestions on that, folks?
>
> This looks like some setup that belongs into the bootloader. If you
> are
> handing over the console from bootloader to kernel, the hardware
> should
> already be in a working state, with no need to touch it during early
> boot.
>
> If you are dealing with broken bootloaders that are not under your
> control,
> having this code in the architecture specific early boot as a fixup
> would be better than putting it into the driver.

Agreed. I am not fond of having a driver poking into an unrelated
subsystem's memory area.

Just disable the divider in ingenic_fixup_fdt() in
arch/mips/generic/board-ingenic.c.

Cheers,
-Paul