public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Ashok Raj <ashok.raj@intel.com>
To: Borislav Petkov <bp@alien8.de>, Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	LKML Mailing List <linux-kernel@vger.kernel.org>,
	X86-kernel <x86@kernel.org>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Arjan van de Ven <arjan.van.de.ven@intel.com>,
	Jacob Jun Pan <jacob.jun.pan@intel.com>,
	Ashok Raj <ashok.raj@intel.com>
Subject: [PATCH 10/13] x86/microcode/intel: Drop wbinvd() from microcode loading
Date: Fri, 14 Oct 2022 13:09:10 -0700	[thread overview]
Message-ID: <20221014200913.14644-11-ashok.raj@intel.com> (raw)
In-Reply-To: <20221014200913.14644-1-ashok.raj@intel.com>

Some older processors had a bad interaction when updating microcode if the
caches were dirty causing machine checks. The wbinvd() was added to
mitigate that before performing microcode updates. Now that Linux checks
for the minimum version before performing an update, those microcode
revisions can't be loaded. Remove calls to wbinvd().

Reviewed-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
---
 arch/x86/kernel/cpu/microcode/intel.c | 11 -----------
 1 file changed, 11 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index c8ee53fcf04d..c61aa661ac2f 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -541,11 +541,6 @@ static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
 	}
 
 	old_rev = rev;
-	/*
-	 * Writeback and invalidate caches before updating microcode to avoid
-	 * internal issues depending on what the microcode is updating.
-	 */
-	native_wbinvd();
 
 	/* write microcode via MSR 0x79 */
 	native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
@@ -773,12 +768,6 @@ static enum ucode_state apply_microcode_intel(int cpu)
 		goto out;
 	}
 
-	/*
-	 * Writeback and invalidate caches before updating microcode to avoid
-	 * internal issues depending on what the microcode is updating.
-	 */
-	native_wbinvd();
-
 	/* write microcode via MSR 0x79 */
 	wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
 
-- 
2.34.1


  parent reply	other threads:[~2022-10-14 20:10 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-14 20:09 [PATCH 00/13] Make microcode loading more robust Ashok Raj
2022-10-14 20:09 ` [PATCH 01/13] x86/microcode/intel: Print old and new rev after early microcode update Ashok Raj
2022-10-19 10:12   ` Borislav Petkov
2022-10-19 13:30     ` Ashok Raj
2022-10-14 20:09 ` [PATCH 02/13] x86/microcode: Do not load from filesystem for CPU hot add Ashok Raj
2022-10-19 17:52   ` Borislav Petkov
2022-10-19 17:54     ` [PATCH 1/5] x86/microcode: Rip out the subsys interface gunk Borislav Petkov
2022-10-19 17:54       ` [PATCH 2/5] x86/microcode: Simplify init path even more Borislav Petkov
2022-10-19 19:22         ` Ashok Raj
2022-10-19 19:37           ` Borislav Petkov
2022-10-20  8:18             ` Borislav Petkov
2022-10-20 15:04               ` Ashok Raj
2022-10-21  9:28                 ` Borislav Petkov
2022-10-21 10:21                   ` Ashok Raj
2022-10-21 10:57                     ` Borislav Petkov
2022-10-21 11:39                       ` Ashok Raj
2022-10-21 13:30                         ` Borislav Petkov
2022-10-19 17:54       ` [PATCH 3/5] x86/microcode: Kill refresh_fw Borislav Petkov
2022-10-19 17:54       ` [PATCH 4/5] x86/microcode: Do some minor fixups Borislav Petkov
2022-10-19 17:54       ` [PATCH 5/5] x86/microcode: Drop struct ucode_cpu_info.valid Borislav Petkov
2022-10-20 15:48       ` [PATCH -v2 1/5] x86/microcode: Rip out the subsys interface gunk Borislav Petkov
2022-10-14 20:09 ` [PATCH 03/13] x86/microcode/intel: Fix a hang if early loading microcode fails Ashok Raj
2022-10-14 20:09 ` [PATCH 04/13] x86/x2apic: Support x2apic self IPI with NMI_VECTOR Ashok Raj
2022-10-19 15:36   ` Ashok Raj
2022-10-14 20:09 ` [PATCH 05/13] x86/microcode: Place siblings in NMI loop while update in progress Ashok Raj
2022-10-14 20:09 ` [PATCH 06/13] x86/microcode: Rename refresh_fw to late_loading Ashok Raj
2022-10-14 20:09 ` [PATCH 07/13] x86/microcode: Move late-load warning to earlier where kernel taint happens Ashok Raj
2022-10-14 20:09 ` [PATCH 08/13] x86/microcode/intel: Add minimum required revision to microcode header Ashok Raj
2022-10-14 20:09 ` [PATCH 09/13] x86/microcode: Add a generic mechanism to declare support for minrev Ashok Raj
2022-10-19  4:03   ` Huang, Kai
2022-10-19 12:48     ` Ashok Raj
2022-10-14 20:09 ` Ashok Raj [this message]
2022-10-14 20:09 ` [PATCH 11/13] x86/microcode: Display revisions only when update is successful Ashok Raj
2022-10-14 20:09 ` [PATCH 12/13] x86/mce: Warn of a microcode update is in progress when MCE arrives Ashok Raj
2022-10-14 20:09 ` [PATCH 13/13] x86/microcode/intel: Add ability to update microcode even if rev is unchanged Ashok Raj
2022-10-19 15:51   ` Ashok Raj

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221014200913.14644-11-ashok.raj@intel.com \
    --to=ashok.raj@intel.com \
    --cc=arjan.van.de.ven@intel.com \
    --cc=bp@alien8.de \
    --cc=dave.hansen@intel.com \
    --cc=jacob.jun.pan@intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=tglx@linutronix.de \
    --cc=thomas.lendacky@amd.com \
    --cc=tony.luck@intel.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox