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From: Stephen Boyd <sboyd@kernel.org>
To: Rahul Tanwar <rtanwar@maxlinear.com>,
	linux-clk@vger.kernel.org, mturquette@baylibre.com,
	yzhu@maxlinear.com
Cc: linux-kernel@vger.kernel.org, linux-lgm-soc@maxlinear.com,
	Rahul Tanwar <rtanwar@maxlinear.com>
Subject: Re: [PATCH v4 2/4] clk: mxl: Remove redundant spinlocks
Date: Mon, 17 Oct 2022 15:28:51 -0700	[thread overview]
Message-ID: <20221017222853.68A98C433C1@smtp.kernel.org> (raw)
In-Reply-To: <a8a02c8773b88924503a9fdaacd37dd2e6488bf3.1665642720.git.rtanwar@maxlinear.com>

Quoting Rahul Tanwar (2022-10-12 23:48:31)
> Patch 1/4 of this patch series switches from direct readl/writel
> based register access to regmap based register access. Instead
> of using direct readl/writel, regmap API's are used to read, write
> & read-modify-write clk registers. Regmap API's already use their
> own spinlocks to serialize the register accesses across multiple
> cores in which case additional driver spinlocks becomes redundant.
> 
> Hence, remove redundant spinlocks from driver in this patch 2/4.
> 
> Reviewed-by: Yi xin Zhu <yzhu@maxlinear.com>
> Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com>
> ---

Applied to clk-next

  reply	other threads:[~2022-10-17 22:30 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-13  6:48 [PATCH v4 0/4] Modify MxL's CGU clk driver to make it secure boot compatible Rahul Tanwar
2022-10-13  6:48 ` [PATCH v4 1/4] clk: mxl: Switch from direct readl/writel based IO to regmap based IO Rahul Tanwar
2022-10-17 22:28   ` Stephen Boyd
2022-10-13  6:48 ` [PATCH v4 2/4] clk: mxl: Remove redundant spinlocks Rahul Tanwar
2022-10-17 22:28   ` Stephen Boyd [this message]
2022-10-13  6:48 ` [PATCH v4 3/4] clk: mxl: Add option to override gate clks Rahul Tanwar
2022-10-17 22:28   ` Stephen Boyd
2022-10-13  6:48 ` [PATCH v4 4/4] clk: mxl: Fix a clk entry by adding relevant flags Rahul Tanwar
2022-10-17 22:29   ` Stephen Boyd

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