From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05B85ECAAA1 for ; Fri, 28 Oct 2022 17:22:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230219AbiJ1RWQ (ORCPT ); Fri, 28 Oct 2022 13:22:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231202AbiJ1RWN (ORCPT ); Fri, 28 Oct 2022 13:22:13 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 550D86CD3A; Fri, 28 Oct 2022 10:22:12 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E7883629D3; Fri, 28 Oct 2022 17:22:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6164FC433C1; Fri, 28 Oct 2022 17:22:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1666977731; bh=RCc4qKIHtkfxg/CFdtsU8GG54g7gSd6z0PMWBWissZs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hgrFOb/4HzKUvv7KCSfPG29Jk88l8NVf52ETzbuajDpZtDpK3IkzcC1BlCOe8/TwW eA7AKPRABd3nb9E6GgduXlhnBrd6xb5+tWF9S+j9TpIzsfCp2/lpBGotm9IgGMbLbF VekBR/bAebefY1Sqtg7KS/PFFh9ZtBpnMSw8CkadZGLtpIPobXDQF63nPmxc+OwAmU Tay8GroEAdj4NKa9yKtVZ9/0wYL5PyGC20nvJEabKlQ+pK/3IoWCRjaf7YiVovKJIH WxvxkX8gt4JG0JVegYJsZWbWylcxm/V4Z7fEmkPwbBdWcrn41Z8ASSZqR9RhbtDQ2K R3uDFIGMvJeFA== Date: Fri, 28 Oct 2022 22:52:03 +0530 From: Manivannan Sadhasivam To: Qiang Yu Cc: quic_hemantk@quicinc.com, loic.poulain@linaro.org, mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, mrana@quicinc.com Subject: Re: [PATCH] bus: mhi: host: Use mhi_soc_reset() API in place of register write Message-ID: <20221028172203.GD13880@thinkpad> References: <1665376324-34258-1-git-send-email-quic_qianyu@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1665376324-34258-1-git-send-email-quic_qianyu@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Oct 10, 2022 at 12:32:04PM +0800, Qiang Yu wrote: > Currently, a direct register write is used when ramdump collection > in panic path occurs. Replace that with new mhi_soc_reset() API > such that a controller defined reset() function is exercised if > one is present and the regular SOC reset is done if it is not. > > Signed-off-by: Qiang Yu > Reviewed-by: Loic Poulain > Reviewed-by: Jeffrey Hugo Reviewed-by: Manivannan Sadhasivam Btw, this patch is supposed to be v2... Please keep the version info and also add the changelog for future patches. Thanks, Mani > --- > drivers/bus/mhi/host/boot.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c > index 26d0edd..1c69fee 100644 > --- a/drivers/bus/mhi/host/boot.c > +++ b/drivers/bus/mhi/host/boot.c > @@ -118,9 +118,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl) > /* Hardware reset so force device to enter RDDM */ > dev_dbg(dev, > "Did not enter RDDM, do a host req reset\n"); > - mhi_write_reg(mhi_cntrl, mhi_cntrl->regs, > - MHI_SOC_RESET_REQ_OFFSET, > - MHI_SOC_RESET_REQ); > + mhi_soc_reset(mhi_cntrl); > udelay(delayus); > } > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > -- மணிவண்ணன் சதாசிவம்