[PATCH 3/7] soc: renesas: r9a06g032-sysctrl: Handle h2mode device-tree property

Herve Codina
2022-11-07T14:00:08Z

Handle the h2mode property and forces the CFG_USB[H2MODE] bit
accordingly.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
drivers/clk/renesas/r9a06g032-clocks.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c
index c07131c47a9f..562c2aba910b 100644
--- a/drivers/clk/renesas/r9a06g032-clocks.c
+++ b/drivers/clk/renesas/r9a06g032-clocks.c
@@ -946,6 +946,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev)
struct clk *mclk;
unsigned int i;
u16 uart_group_sel[2];
+ u32 usb, h2mode;
int error;

clocks = devm_kzalloc(dev, sizeof(*clocks), GFP_KERNEL);
@@ -966,6 +967,26 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev)
clocks->reg = of_iomap(np, 0);
if (WARN_ON(!clocks->reg))
return -ENOMEM;
+
+ error = of_property_read_u32(np, "renesas,h2mode", &h2mode);
+ if (!error) {
+ usb = readl(clocks->reg + R9A06G032_SYSCTRL_USB);
+ switch (h2mode) {
+ case 0:
+ /* 1 host, 1 device */
+ usb &= ~R9A06G032_SYSCTRL_USB_H2MODE;
+ break;
+ case 1:
+ /* 2 hosts */
+ usb |= R9A06G032_SYSCTRL_USB_H2MODE;
+ break;
+ default:
+ dev_err(dev, "invalid h2mode %d\n", h2mode);
+ return -EINVAL;
+ }
+ writel(usb, clocks->reg + R9A06G032_SYSCTRL_USB);
+ }
+
for (i = 0; i < ARRAY_SIZE(r9a06g032_clocks); ++i) {
const struct r9a06g032_clkdesc *d = &r9a06g032_clocks[i];
const char *parent_name = d->source ?
--
2.37.3