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Wed, 16 Nov 2022 22:55:20 GMT Received: from quicinc.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 16 Nov 2022 14:55:20 -0800 Date: Wed, 16 Nov 2022 14:55:18 -0800 From: Guru Das Srinagesh To: Sibi Sankar CC: , , , , , , , , , Subject: Re: [PATCH V4 2/2] firmware: qcom: scm: Add wait-queue handling logic Message-ID: <20221116225518.GA14011@quicinc.com> References: <20221114082644.28739-1-quic_sibis@quicinc.com> <20221114082644.28739-3-quic_sibis@quicinc.com> <20221115053336.GA29781@quicinc.com> <1b462f1a-327b-4a8f-8de7-909dbad0ddf8@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1b462f1a-327b-4a8f-8de7-909dbad0ddf8@quicinc.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: SVM3yGXHAjs4FOV9cC5L2J3JSgeh1y2o X-Proofpoint-GUID: SVM3yGXHAjs4FOV9cC5L2J3JSgeh1y2o X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-16_03,2022-11-16_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 mlxscore=0 spamscore=0 mlxlogscore=933 phishscore=0 adultscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211160157 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Nov 16 2022 12:11, Sibi Sankar wrote: > Hey Guru, > > Thanks for taking time to review the series. > > On 11/15/22 11:03, Guru Das Srinagesh wrote: > >On Nov 14 2022 13:56, Sibi Sankar wrote: > > > >(snip) > > > >>+static irqreturn_t qcom_scm_irq_handler(int irq, void *data) > >>+{ > >>+ int ret; > >>+ struct qcom_scm *scm = data; > >>+ struct completion *wq_to_wake; > >>+ u32 wq_ctx, flags, more_pending = 0; > >>+ > >>+ do { > >>+ ret = scm_get_wq_ctx(&wq_ctx, &flags, &more_pending); > >>+ if (ret) { > >>+ dev_err(scm->dev, "GET_WQ_CTX SMC call failed: %d\n", ret); > >>+ goto out; > >>+ } > >>+ > >>+ wq_to_wake = qcom_scm_lookup_wq(scm, wq_ctx); > >>+ if (IS_ERR_OR_NULL(wq_to_wake)) { > >>+ dev_err(scm->dev, "No waitqueue found for wq_ctx %d: %ld\n", > >>+ wq_ctx, PTR_ERR(wq_to_wake)); > >>+ goto out; > >>+ } > >>+ > >>+ if (flags != QCOM_SMC_WAITQ_FLAG_WAKE_ONE && > >>+ flags != QCOM_SMC_WAITQ_FLAG_WAKE_ALL) { > >>+ dev_err(scm->dev, "Invalid Flags found for wq_ctx: %u\n", flags); > >>+ goto out; > >>+ } > >>+ > >>+ complete(wq_to_wake); > > > >Need to call complete() or complete_all() based on the flags. > > with the current implementation we should get away with > just complete for now but I can add them back in the way > Bjorn wanted i.e. with the bool wake_all in the next > re-spin. Sounds good, let's consume the flags according to their intended purpose. Thank you. Guru Das.