From: Hal Feng <hal.feng@starfivetech.com>
To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v2 13/14] reset: starfive: Add StarFive JH7110 reset driver
Date: Fri, 18 Nov 2022 09:06:26 +0800 [thread overview]
Message-ID: <20221118010627.70576-14-hal.feng@starfivetech.com> (raw)
In-Reply-To: <20221118010627.70576-1-hal.feng@starfivetech.com>
Add auxiliary driver to support StarFive JH7110 system
and always-on resets.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
drivers/reset/starfive/Kconfig | 8 +++
drivers/reset/starfive/Makefile | 1 +
.../reset/starfive/reset-starfive-jh7110.c | 67 +++++++++++++++++++
.../reset/starfive/reset-starfive-jh71x0.h | 7 ++
4 files changed, 83 insertions(+)
create mode 100644 drivers/reset/starfive/reset-starfive-jh7110.c
diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
index 9d15c4110e40..fab1a081af17 100644
--- a/drivers/reset/starfive/Kconfig
+++ b/drivers/reset/starfive/Kconfig
@@ -10,3 +10,11 @@ config RESET_STARFIVE_JH7100
default SOC_STARFIVE
help
This enables the reset controller driver for the StarFive JH7100 SoC.
+
+config RESET_STARFIVE_JH7110
+ bool "StarFive JH7110 Reset Driver"
+ depends on AUXILIARY_BUS && CLK_STARFIVE_JH7110_SYS
+ select RESET_STARFIVE_JH71X0
+ default CLK_STARFIVE_JH7110_SYS
+ help
+ This enables the reset controller driver for the StarFive JH7110 SoC.
diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
index f6aa12466fad..7a44b66fb9d5 100644
--- a/drivers/reset/starfive/Makefile
+++ b/drivers/reset/starfive/Makefile
@@ -2,3 +2,4 @@
obj-$(CONFIG_RESET_STARFIVE_JH71X0) += reset-starfive-jh71x0.o
obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
+obj-$(CONFIG_RESET_STARFIVE_JH7110) += reset-starfive-jh7110.o
diff --git a/drivers/reset/starfive/reset-starfive-jh7110.c b/drivers/reset/starfive/reset-starfive-jh7110.c
new file mode 100644
index 000000000000..00f3b4ecfb02
--- /dev/null
+++ b/drivers/reset/starfive/reset-starfive-jh7110.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Reset driver for the StarFive JH7110 SoC
+ *
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+#include <linux/auxiliary_bus.h>
+
+#include "reset-starfive-jh71x0.h"
+
+#include <dt-bindings/reset/starfive-jh7110.h>
+
+static int jh7110_reset_probe(struct auxiliary_device *adev,
+ const struct auxiliary_device_id *id)
+{
+ struct reset_info *info = (struct reset_info *)(id->driver_data);
+ void __iomem *base = dev_get_drvdata(adev->dev.parent);
+
+ if (!info || !base)
+ return -ENODEV;
+
+ return reset_starfive_jh71x0_register(&adev->dev, adev->dev.parent->of_node,
+ base + info->assert_offset,
+ base + info->status_offset,
+ info->asserted,
+ info->nr_resets,
+ false);
+}
+
+static const struct reset_info jh7110_sys_info = {
+ .nr_resets = JH7110_SYSRST_END,
+ .assert_offset = 0x2F8,
+ .status_offset = 0x308,
+ .asserted = NULL,
+};
+
+static const struct reset_info jh7110_aon_info = {
+ .nr_resets = JH7110_AONRST_END,
+ .assert_offset = 0x38,
+ .status_offset = 0x3C,
+ .asserted = NULL,
+};
+
+static const struct auxiliary_device_id jh7110_reset_ids[] = {
+ {
+ .name = "clk_starfive_jh71x0.reset-sys",
+ .driver_data = (kernel_ulong_t)&jh7110_sys_info,
+ },
+ {
+ .name = "clk_starfive_jh71x0.reset-aon",
+ .driver_data = (kernel_ulong_t)&jh7110_aon_info,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(auxiliary, jh7110_reset_ids);
+
+static struct auxiliary_driver jh7110_reset_driver = {
+ .probe = jh7110_reset_probe,
+ .id_table = jh7110_reset_ids,
+};
+module_auxiliary_driver(jh7110_reset_driver);
+
+MODULE_DESCRIPTION("StarFive JH7110 Reset Driver");
+MODULE_AUTHOR("Hal Feng <hal.feng@starfivetech.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/reset/starfive/reset-starfive-jh71x0.h b/drivers/reset/starfive/reset-starfive-jh71x0.h
index e6b27110de48..63a94ee1b395 100644
--- a/drivers/reset/starfive/reset-starfive-jh71x0.h
+++ b/drivers/reset/starfive/reset-starfive-jh71x0.h
@@ -6,6 +6,13 @@
#ifndef __RESET_STARFIVE_JH71X0_H
#define __RESET_STARFIVE_JH71X0_H
+struct reset_info {
+ unsigned int nr_resets;
+ unsigned int assert_offset;
+ unsigned int status_offset;
+ const u32 *asserted;
+};
+
int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
void __iomem *assert, void __iomem *status,
const u32 *asserted, unsigned int nr_resets,
--
2.38.1
next prev parent reply other threads:[~2022-11-18 1:33 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 1:06 [PATCH v2 00/14] Basic clock and reset support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18 1:06 ` [PATCH v2 01/14] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2022-11-18 16:22 ` Emil Renner Berthing
2022-11-21 6:25 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 02/14] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2022-11-18 16:26 ` Emil Renner Berthing
2022-11-21 7:16 ` Hal Feng
2022-11-21 11:32 ` Emil Renner Berthing
2022-11-21 13:13 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 03/14] reset: Create subdirectory for StarFive drivers Hal Feng
2022-11-18 16:29 ` Emil Renner Berthing
2022-11-18 1:06 ` [PATCH v2 04/14] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2022-11-18 16:39 ` Emil Renner Berthing
2022-11-21 9:23 ` Hal Feng
2022-11-21 11:26 ` Emil Renner Berthing
2022-11-18 1:06 ` [PATCH v2 05/14] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2022-11-18 1:06 ` [PATCH v2 06/14] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2022-11-18 1:06 ` [PATCH v2 07/14] dt-bindings: clock: Add StarFive JH7110 system and always-on clock definitions Hal Feng
2022-11-21 8:45 ` Krzysztof Kozlowski
2022-11-22 1:02 ` Hal Feng
2022-11-22 7:41 ` Krzysztof Kozlowski
2022-11-22 8:04 ` Hal Feng
2022-11-23 9:34 ` Krzysztof Kozlowski
2022-11-18 1:06 ` [PATCH v2 08/14] dt-bindings: reset: Add StarFive JH7110 system and always-on reset definitions Hal Feng
2022-11-18 16:47 ` Emil Renner Berthing
2022-11-22 1:20 ` Hal Feng
2022-11-21 8:45 ` Krzysztof Kozlowski
2022-11-21 8:50 ` Krzysztof Kozlowski
2022-11-22 1:26 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2022-11-18 16:50 ` Emil Renner Berthing
2022-11-21 8:47 ` Krzysztof Kozlowski
2022-11-22 1:45 ` Hal Feng
2022-11-21 8:47 ` Krzysztof Kozlowski
2022-11-25 6:41 ` Hal Feng
2022-11-30 9:47 ` Hal Feng
2022-11-30 11:48 ` Krzysztof Kozlowski
2022-11-30 15:12 ` Hal Feng
2022-11-30 15:19 ` Krzysztof Kozlowski
2022-11-30 18:05 ` Hal Feng
2022-12-01 10:21 ` Krzysztof Kozlowski
2022-12-02 2:06 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 10/14] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2022-11-21 8:49 ` Krzysztof Kozlowski
2022-11-21 11:38 ` Emil Renner Berthing
2022-11-21 13:24 ` Krzysztof Kozlowski
2022-11-18 1:06 ` [PATCH v2 11/14] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2022-11-18 17:03 ` Emil Renner Berthing
2022-11-25 2:33 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 12/14] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2022-11-18 1:06 ` Hal Feng [this message]
2022-11-18 17:14 ` [PATCH v2 13/14] reset: starfive: Add StarFive JH7110 reset driver Emil Renner Berthing
2022-11-22 5:55 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 14/14] clk: starfive: jh71x0: Don't register aux devices if JH7110 reset is disabled Hal Feng
2022-11-18 17:18 ` Emil Renner Berthing
2022-11-22 6:12 ` Hal Feng
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