From: Hal Feng <hal.feng@starfivetech.com>
To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v2 05/14] reset: starfive: Rename "jh7100" to "jh71x0" for the common code
Date: Fri, 18 Nov 2022 09:06:18 +0800 [thread overview]
Message-ID: <20221118010627.70576-6-hal.feng@starfivetech.com> (raw)
In-Reply-To: <20221118010627.70576-1-hal.feng@starfivetech.com>
For the common code will be shared with the StarFive JH7110 SoC.
Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
.../reset/starfive/reset-starfive-jh7100.c | 2 +-
.../reset/starfive/reset-starfive-jh71x0.c | 50 +++++++++----------
.../reset/starfive/reset-starfive-jh71x0.h | 2 +-
3 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/drivers/reset/starfive/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c
index 43248e8135fd..4be8510f1dd9 100644
--- a/drivers/reset/starfive/reset-starfive-jh7100.c
+++ b/drivers/reset/starfive/reset-starfive-jh7100.c
@@ -51,7 +51,7 @@ static int __init jh7100_reset_probe(struct platform_device *pdev)
if (IS_ERR(base))
return PTR_ERR(base);
- return reset_starfive_jh7100_register(&pdev->dev, pdev->dev.of_node,
+ return reset_starfive_jh71x0_register(&pdev->dev, pdev->dev.of_node,
base + JH7100_RESET_ASSERT0,
base + JH7100_RESET_STATUS0,
jh7100_reset_asserted,
diff --git a/drivers/reset/starfive/reset-starfive-jh71x0.c b/drivers/reset/starfive/reset-starfive-jh71x0.c
index 1e230f3f9841..fa80912ef08e 100644
--- a/drivers/reset/starfive/reset-starfive-jh71x0.c
+++ b/drivers/reset/starfive/reset-starfive-jh71x0.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
- * Reset driver for the StarFive JH7100 SoC
+ * Reset driver for the StarFive JH71X0 SoCs
*
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
*/
@@ -13,7 +13,7 @@
#include <linux/reset-controller.h>
#include <linux/spinlock.h>
-struct jh7100_reset {
+struct jh71x0_reset {
struct reset_controller_dev rcdev;
/* protect registers against concurrent read-modify-write */
spinlock_t lock;
@@ -22,16 +22,16 @@ struct jh7100_reset {
const u64 *asserted;
};
-static inline struct jh7100_reset *
-jh7100_reset_from(struct reset_controller_dev *rcdev)
+static inline struct jh71x0_reset *
+jh71x0_reset_from(struct reset_controller_dev *rcdev)
{
- return container_of(rcdev, struct jh7100_reset, rcdev);
+ return container_of(rcdev, struct jh71x0_reset, rcdev);
}
-static int jh7100_reset_update(struct reset_controller_dev *rcdev,
+static int jh71x0_reset_update(struct reset_controller_dev *rcdev,
unsigned long id, bool assert)
{
- struct jh7100_reset *data = jh7100_reset_from(rcdev);
+ struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
unsigned long offset = BIT_ULL_WORD(id);
u64 mask = BIT_ULL_MASK(id);
void __iomem *reg_assert = data->assert + offset * sizeof(u64);
@@ -60,34 +60,34 @@ static int jh7100_reset_update(struct reset_controller_dev *rcdev,
return ret;
}
-static int jh7100_reset_assert(struct reset_controller_dev *rcdev,
+static int jh71x0_reset_assert(struct reset_controller_dev *rcdev,
unsigned long id)
{
- return jh7100_reset_update(rcdev, id, true);
+ return jh71x0_reset_update(rcdev, id, true);
}
-static int jh7100_reset_deassert(struct reset_controller_dev *rcdev,
+static int jh71x0_reset_deassert(struct reset_controller_dev *rcdev,
unsigned long id)
{
- return jh7100_reset_update(rcdev, id, false);
+ return jh71x0_reset_update(rcdev, id, false);
}
-static int jh7100_reset_reset(struct reset_controller_dev *rcdev,
+static int jh71x0_reset_reset(struct reset_controller_dev *rcdev,
unsigned long id)
{
int ret;
- ret = jh7100_reset_assert(rcdev, id);
+ ret = jh71x0_reset_assert(rcdev, id);
if (ret)
return ret;
- return jh7100_reset_deassert(rcdev, id);
+ return jh71x0_reset_deassert(rcdev, id);
}
-static int jh7100_reset_status(struct reset_controller_dev *rcdev,
+static int jh71x0_reset_status(struct reset_controller_dev *rcdev,
unsigned long id)
{
- struct jh7100_reset *data = jh7100_reset_from(rcdev);
+ struct jh71x0_reset *data = jh71x0_reset_from(rcdev);
unsigned long offset = BIT_ULL_WORD(id);
u64 mask = BIT_ULL_MASK(id);
void __iomem *reg_status = data->status + offset * sizeof(u64);
@@ -96,25 +96,25 @@ static int jh7100_reset_status(struct reset_controller_dev *rcdev,
return !((value ^ data->asserted[offset]) & mask);
}
-static const struct reset_control_ops jh7100_reset_ops = {
- .assert = jh7100_reset_assert,
- .deassert = jh7100_reset_deassert,
- .reset = jh7100_reset_reset,
- .status = jh7100_reset_status,
+static const struct reset_control_ops jh71x0_reset_ops = {
+ .assert = jh71x0_reset_assert,
+ .deassert = jh71x0_reset_deassert,
+ .reset = jh71x0_reset_reset,
+ .status = jh71x0_reset_status,
};
-int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
+int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
void __iomem *assert, void __iomem *status,
const u64 *asserted, unsigned int nr_resets,
bool is_module)
{
- struct jh7100_reset *data;
+ struct jh71x0_reset *data;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
- data->rcdev.ops = &jh7100_reset_ops;
+ data->rcdev.ops = &jh71x0_reset_ops;
if (is_module)
data->rcdev.owner = THIS_MODULE;
data->rcdev.nr_resets = nr_resets;
@@ -128,4 +128,4 @@ int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_no
return devm_reset_controller_register(dev, &data->rcdev);
}
-EXPORT_SYMBOL_GPL(reset_starfive_jh7100_register);
+EXPORT_SYMBOL_GPL(reset_starfive_jh71x0_register);
diff --git a/drivers/reset/starfive/reset-starfive-jh71x0.h b/drivers/reset/starfive/reset-starfive-jh71x0.h
index 10770c55ab0e..3c70982dd56e 100644
--- a/drivers/reset/starfive/reset-starfive-jh71x0.h
+++ b/drivers/reset/starfive/reset-starfive-jh71x0.h
@@ -6,7 +6,7 @@
#ifndef __RESET_STARFIVE_JH71X0_H
#define __RESET_STARFIVE_JH71X0_H
-int reset_starfive_jh7100_register(struct device *dev, struct device_node *of_node,
+int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
void __iomem *assert, void __iomem *status,
const u64 *asserted, unsigned int nr_resets,
bool is_module);
--
2.38.1
next prev parent reply other threads:[~2022-11-18 1:35 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 1:06 [PATCH v2 00/14] Basic clock and reset support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18 1:06 ` [PATCH v2 01/14] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2022-11-18 16:22 ` Emil Renner Berthing
2022-11-21 6:25 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 02/14] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2022-11-18 16:26 ` Emil Renner Berthing
2022-11-21 7:16 ` Hal Feng
2022-11-21 11:32 ` Emil Renner Berthing
2022-11-21 13:13 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 03/14] reset: Create subdirectory for StarFive drivers Hal Feng
2022-11-18 16:29 ` Emil Renner Berthing
2022-11-18 1:06 ` [PATCH v2 04/14] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2022-11-18 16:39 ` Emil Renner Berthing
2022-11-21 9:23 ` Hal Feng
2022-11-21 11:26 ` Emil Renner Berthing
2022-11-18 1:06 ` Hal Feng [this message]
2022-11-18 1:06 ` [PATCH v2 06/14] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2022-11-18 1:06 ` [PATCH v2 07/14] dt-bindings: clock: Add StarFive JH7110 system and always-on clock definitions Hal Feng
2022-11-21 8:45 ` Krzysztof Kozlowski
2022-11-22 1:02 ` Hal Feng
2022-11-22 7:41 ` Krzysztof Kozlowski
2022-11-22 8:04 ` Hal Feng
2022-11-23 9:34 ` Krzysztof Kozlowski
2022-11-18 1:06 ` [PATCH v2 08/14] dt-bindings: reset: Add StarFive JH7110 system and always-on reset definitions Hal Feng
2022-11-18 16:47 ` Emil Renner Berthing
2022-11-22 1:20 ` Hal Feng
2022-11-21 8:45 ` Krzysztof Kozlowski
2022-11-21 8:50 ` Krzysztof Kozlowski
2022-11-22 1:26 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2022-11-18 16:50 ` Emil Renner Berthing
2022-11-21 8:47 ` Krzysztof Kozlowski
2022-11-22 1:45 ` Hal Feng
2022-11-21 8:47 ` Krzysztof Kozlowski
2022-11-25 6:41 ` Hal Feng
2022-11-30 9:47 ` Hal Feng
2022-11-30 11:48 ` Krzysztof Kozlowski
2022-11-30 15:12 ` Hal Feng
2022-11-30 15:19 ` Krzysztof Kozlowski
2022-11-30 18:05 ` Hal Feng
2022-12-01 10:21 ` Krzysztof Kozlowski
2022-12-02 2:06 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 10/14] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2022-11-21 8:49 ` Krzysztof Kozlowski
2022-11-21 11:38 ` Emil Renner Berthing
2022-11-21 13:24 ` Krzysztof Kozlowski
2022-11-18 1:06 ` [PATCH v2 11/14] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2022-11-18 17:03 ` Emil Renner Berthing
2022-11-25 2:33 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 12/14] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2022-11-18 1:06 ` [PATCH v2 13/14] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2022-11-18 17:14 ` Emil Renner Berthing
2022-11-22 5:55 ` Hal Feng
2022-11-18 1:06 ` [PATCH v2 14/14] clk: starfive: jh71x0: Don't register aux devices if JH7110 reset is disabled Hal Feng
2022-11-18 17:18 ` Emil Renner Berthing
2022-11-22 6:12 ` Hal Feng
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