From: Conor Dooley <conor@kernel.org>
To: Marc Zyngier <maz@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v2 1/3] irqchip/sifive-plic: remove user selectability of SIFIVE_PLIC
Date: Fri, 18 Nov 2022 10:42:59 +0000 [thread overview]
Message-ID: <20221118104300.85016-2-conor@kernel.org> (raw)
In-Reply-To: <20221118104300.85016-1-conor@kernel.org>
From: Conor Dooley <conor.dooley@microchip.com>
The SiFive PLIC driver is used by all current implementations, including
those that do not have a SiFive PLIC. The current driver supports more
than just SiFive PLICs at present and, where possible, future PLIC
implementations will also use this driver. As every supported RISC-V SoC
selects the driver directly in Kconfig.socs there's no point in exposing
this kconfig option to users.
The Kconfig help text, in its current form, is misleading. There's no
point doing anything about that though, as it will no longer be user
selectable. Remove it.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/irqchip/Kconfig | 10 +---------
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 7ef9f5e696d3..ecb3e3119d2e 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -551,18 +551,10 @@ config RISCV_INTC
If you don't know what to do here, say Y.
config SIFIVE_PLIC
- bool "SiFive Platform-Level Interrupt Controller"
+ bool
depends on RISCV
select IRQ_DOMAIN_HIERARCHY
select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
- help
- This enables support for the PLIC chip found in SiFive (and
- potentially other) RISC-V systems. The PLIC controls devices
- interrupts and connects them to each core's local interrupt
- controller. Aside from timer and software interrupts, all other
- interrupt sources are subordinate to the PLIC.
-
- If you don't know what to do here, say Y.
config EXYNOS_IRQ_COMBINER
bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
--
2.37.2
next prev parent reply other threads:[~2022-11-18 10:44 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 10:42 [PATCH v2 0/3] RISC-V interrupt controller select cleanup Conor Dooley
2022-11-18 10:42 ` Conor Dooley [this message]
2022-11-18 10:43 ` [PATCH v2 2/3] irqchip/riscv-intc: remove user selectability of RISCV_INTC Conor Dooley
2022-11-18 10:43 ` [PATCH v2 3/3] RISC-V: stop selecting SIFIVE_PLIC at the SoC level Conor Dooley
2022-11-26 11:49 ` [PATCH v2 0/3] RISC-V interrupt controller select cleanup Marc Zyngier
2022-12-08 23:58 ` Palmer Dabbelt
2022-12-09 1:30 ` patchwork-bot+linux-riscv
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