From: Conor Dooley <conor@kernel.org>
To: Marc Zyngier <maz@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v2 2/3] irqchip/riscv-intc: remove user selectability of RISCV_INTC
Date: Fri, 18 Nov 2022 10:43:00 +0000 [thread overview]
Message-ID: <20221118104300.85016-3-conor@kernel.org> (raw)
In-Reply-To: <20221118104300.85016-1-conor@kernel.org>
From: Conor Dooley <conor.dooley@microchip.com>
Since commit e71ee06e3ca3 ("RISC-V: Force select RISCV_INTC for
CONFIG_RISCV") the driver has been enabled at the arch level - and is
mandatory anyway. There's no point exposing this as a choice to users,
so stop bothering.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
I'd swear I had an interaction with someone a few months ago about the
RISCV_INTC Kconfig options but I cannot for the file of me remember who.
I hope this patch is not be going back on what I said then...
---
drivers/irqchip/Kconfig | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index ecb3e3119d2e..4633a549ebbf 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -538,17 +538,8 @@ config TI_PRUSS_INTC
different processors within the SoC.
config RISCV_INTC
- bool "RISC-V Local Interrupt Controller"
+ bool
depends on RISCV
- default y
- help
- This enables support for the per-HART local interrupt controller
- found in standard RISC-V systems. The per-HART local interrupt
- controller handles timer interrupts, software interrupts, and
- hardware interrupts. Without a per-HART local interrupt controller,
- a RISC-V system will be unable to handle any interrupts.
-
- If you don't know what to do here, say Y.
config SIFIVE_PLIC
bool
--
2.37.2
next prev parent reply other threads:[~2022-11-18 10:45 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 10:42 [PATCH v2 0/3] RISC-V interrupt controller select cleanup Conor Dooley
2022-11-18 10:42 ` [PATCH v2 1/3] irqchip/sifive-plic: remove user selectability of SIFIVE_PLIC Conor Dooley
2022-11-18 10:43 ` Conor Dooley [this message]
2022-11-18 10:43 ` [PATCH v2 3/3] RISC-V: stop selecting SIFIVE_PLIC at the SoC level Conor Dooley
2022-11-26 11:49 ` [PATCH v2 0/3] RISC-V interrupt controller select cleanup Marc Zyngier
2022-12-08 23:58 ` Palmer Dabbelt
2022-12-09 1:30 ` patchwork-bot+linux-riscv
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