From: Jiaxi Chen <jiaxi.chen@linux.intel.com>
To: kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com,
alexandre.belloni@bootlin.com, peterz@infradead.org,
jpoimboe@kernel.org, chang.seok.bae@intel.com,
pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com,
jmattson@google.com, sandipan.das@amd.com, tony.luck@intel.com,
sathyanarayanan.kuppuswamy@linux.intel.com, fenghua.yu@intel.com,
keescook@chromium.org, nathan@kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v4 1/6] x86: KVM: Advertise CMPccXADD CPUID to user space
Date: Fri, 18 Nov 2022 22:15:04 +0800 [thread overview]
Message-ID: <20221118141509.489359-2-jiaxi.chen@linux.intel.com> (raw)
In-Reply-To: <20221118141509.489359-1-jiaxi.chen@linux.intel.com>
CMPccXADD is a new set of instructions in the latest Intel platform
Sierra Forest. This new instruction set includes a semaphore operation
that can compare and add the operands if condition is met, which can
improve database performance.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[bit 7]
This CPUID is exposed to userspace. Besides, there is no other VMX
control for this instruction.
Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com>
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/kvm/cpuid.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index b71f4f2ecdd5..19db3940f262 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -308,6 +308,7 @@
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
#define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */
+#define X86_FEATURE_CMPCCXADD (12*32+ 7) /* CMPccXADD instructions */
/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 62bc7a01cecc..7ab7cc717b1c 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -657,7 +657,7 @@ void kvm_set_cpu_caps(void)
kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
kvm_cpu_cap_mask(CPUID_7_1_EAX,
- F(AVX_VNNI) | F(AVX512_BF16)
+ F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD)
);
kvm_cpu_cap_mask(CPUID_D_1_EAX,
--
2.27.0
next prev parent reply other threads:[~2022-11-18 14:15 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-18 14:15 [PATCH v4 0/6] x86: KVM: Advertise CPUID of new Intel platform instructions to user space Jiaxi Chen
2022-11-18 14:15 ` Jiaxi Chen [this message]
2022-11-18 16:47 ` [PATCH v4 1/6] x86: KVM: Advertise CMPccXADD CPUID " Dave Hansen
2022-11-18 18:34 ` Borislav Petkov
2022-11-21 14:46 ` Jiaxi Chen
2022-11-21 15:29 ` Dave Hansen
2022-11-21 15:48 ` Sean Christopherson
2022-11-21 15:53 ` Borislav Petkov
2022-11-21 17:28 ` Sean Christopherson
2022-11-21 19:50 ` Borislav Petkov
2022-11-23 6:33 ` Jiaxi Chen
2022-11-21 15:38 ` Borislav Petkov
2022-11-23 7:46 ` Jiaxi Chen
2022-11-18 14:15 ` [PATCH v4 2/6] x86: KVM: Advertise AMX-FP16 " Jiaxi Chen
2022-11-18 14:15 ` [PATCH v4 3/6] x86: KVM: Advertise AVX-IFMA " Jiaxi Chen
2022-11-18 16:08 ` Sean Christopherson
2022-11-21 14:46 ` Jiaxi Chen
2022-11-18 14:15 ` [PATCH v4 4/6] x86: KVM: Advertise AVX-VNNI-INT8 " Jiaxi Chen
2022-11-18 17:17 ` Sean Christopherson
2022-11-21 15:06 ` Jiaxi Chen
2022-11-18 14:15 ` [PATCH v4 5/6] x86: KVM: Advertise AVX-NE-CONVERT " Jiaxi Chen
2022-11-18 14:15 ` [PATCH v4 6/6] x86: KVM: Advertise PREFETCHIT0/1 " Jiaxi Chen
2022-11-18 15:11 ` [PATCH v4 0/6] x86: KVM: Advertise CPUID of new Intel platform instructions " Borislav Petkov
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