Re: [PATCH v2 00/21] Add Tegra20 parallel video input capture

Dmitry Osipenko
2022-12-20T20:22:25Z

28.11.2022 18:23, Luca Ceresoli пишет:
> Tegra20 and other Tegra SoCs have a video input (VI) peripheral that can
> receive from either MIPI CSI-2 or parallel video (called respectively "CSI"
> and "VIP" in the documentation). The kernel currently has a staging driver
> for Tegra210 CSI capture. This patch set adds support for Tegra20 VIP
> capture.
>
> Unfortunately I had no real documentation available to base this work on.
> I only had a working downstream 3.1 kernel, so I started with the driver
> found there and heavily reworked it to fit into the mainline tegra-video
> driver structure. The existing code appears written with the intent of
> being modular and allow adding new input mechanisms and new SoCs while
> keeping a unique VI core module. However its modularity and extensibility
> was not enough to add Tegra20 VIP support, so I added some hooks to turn
> hard-coded behaviour into per-SoC or per-bus customizable code. There are
> also a fix, some generic cleanups and DT bindings.
>
> Quick tour of the patches:
>
> * Device tree bindings and minor DTS improvements
>
> 01. dt-bindings: display: tegra: add Tegra20 VIP
> 02. dt-bindings: display: tegra: vi: add 'vip' property and example

This series adds the new DT node, but there are no board DTs in upstream
that will use VIP? Will we see the board patches?

In any case, given that you're likely the only one here who has access
to hardware with VIP, you should promote yourself to the tegra-video
driver maintainers and confirm that you will be able to maintain and
test this code for years to come.