From: Johan Hovold <johan+linaro@kernel.org>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: "Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
"Johan Hovold" <johan+linaro@kernel.org>
Subject: [PATCH] dt-bindings: PCI: qcom: Allow 'dma-coherent' property
Date: Mon, 5 Dec 2022 10:45:30 +0100 [thread overview]
Message-ID: <20221205094530.12883-1-johan+linaro@kernel.org> (raw)
Devices on some PCIe buses may be cache coherent and must be marked as
such in the devicetree to avoid data corruption.
This is specifically needed on recent Qualcomm platforms like SC8280XP.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
Lorenzo, the corresponding SC8280XP DT fix is heading for 6.2 so it
would be nice if this one could be merged for 6.2-rc1 (or -rc2) as well
to avoid the corresponding DT validation warnings.
Johan
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 2f851c804bb0..a5859bb3dc28 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -62,6 +62,8 @@ properties:
minItems: 3
maxItems: 13
+ dma-coherent: true
+
interconnects:
maxItems: 2
--
2.37.4
next reply other threads:[~2022-12-05 9:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-05 9:45 Johan Hovold [this message]
2022-12-05 22:25 ` [PATCH] dt-bindings: PCI: qcom: Allow 'dma-coherent' property Rob Herring
2022-12-06 10:56 ` Lorenzo Pieralisi
2022-12-06 11:51 ` Johan Hovold
2022-12-06 12:19 ` Lorenzo Pieralisi
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