Re: [PATCH v5 1/5] dt-bindings: clock: Add SM8550 TCSR CC clocks

Abel Vesa
2022-12-06T21:42:50Z

On 22-12-06 12:23:32, Bjorn Andersson wrote:
> On Tue, Dec 06, 2022 at 02:56:31PM +0200, Abel Vesa wrote:
> > Add bindings documentation for clock TCSR driver on SM8550.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > ---
> > .../bindings/clock/qcom,sm8550-tcsr.yaml | 53 +++++++++++++++++++
> > include/dt-bindings/clock/qcom,sm8550-tcsr.h | 18 +++++++
> > 2 files changed, 71 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
> > create mode 100644 include/dt-bindings/clock/qcom,sm8550-tcsr.h
> >
> > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
> > new file mode 100644
> > index 000000000000..15176b0457d1
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
> > @@ -0,0 +1,53 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm TCSR Clock Controller on SM8550
> > +
> > +maintainers:
> > + - Bjorn Andersson <andersson@kernel.org>
> > +
> > +description: |
> > + Qualcomm TCSR clock control module provides the clocks, resets and
> > + power domains on SM8550
> > +
> > + See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h
> > +
> > +properties:
> > + compatible:
> > + const: qcom,sm8550-tcsr
> > +
> > + clocks:
> > + items:
> > + - description: Board XO source
>
> This sounds like the crystal feeding the PMIC, but the clock here should
> be the signal that arrives at the CXO pin of the SoC.

Oh, I guess this should be:
- description: TCXO pad clock

Will send a new version.

>
> Other than that, this looks good now.
>
> Thanks,
> Bjorn
>
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + '#clock-cells':
> > + const: 1
> > +
> > + '#reset-cells':
> > + const: 1
> > +
> > +required:
> > + - compatible
> > + - clocks
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/clock/qcom,rpmh.h>
> > +
> > + clock-controller@1fc0000 {
> > + compatible = "qcom,sm8550-tcsr";
> > + reg = <0x1fc0000 0x30000>;
> > + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>;
> > + #clock-cells = <1>;
> > + #reset-cells = <1>;
> > + };
> > +
> > +...
> > diff --git a/include/dt-bindings/clock/qcom,sm8550-tcsr.h b/include/dt-bindings/clock/qcom,sm8550-tcsr.h
> > new file mode 100644
> > index 000000000000..091cb76f953a
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/qcom,sm8550-tcsr.h
> > @@ -0,0 +1,18 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> > +/*
> > + * Copyright (c) 2022, The Linux Foundation. All rights reserved.
> > + * Copyright (c) 2022, Linaro Limited
> > + */
> > +
> > +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
> > +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8550_H
> > +
> > +/* TCSR CC clocks */
> > +#define TCSR_PCIE_0_CLKREF_EN 0
> > +#define TCSR_PCIE_1_CLKREF_EN 1
> > +#define TCSR_UFS_CLKREF_EN 2
> > +#define TCSR_UFS_PAD_CLKREF_EN 3
> > +#define TCSR_USB2_CLKREF_EN 4
> > +#define TCSR_USB3_CLKREF_EN 5
> > +
> > +#endif
> > --
> > 2.34.1
> >