From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02F93C10F1E for ; Sun, 18 Dec 2022 16:23:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231671AbiLRQXG (ORCPT ); Sun, 18 Dec 2022 11:23:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59600 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231660AbiLRQWh (ORCPT ); Sun, 18 Dec 2022 11:22:37 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F0A213D7D; Sun, 18 Dec 2022 08:09:15 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 863E9B80BA4; Sun, 18 Dec 2022 16:08:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1FBB5C433EF; Sun, 18 Dec 2022 16:08:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1671379715; bh=a7cOuKmiI68p8RBDkFm/L8woSvQj7c6/VpAFxLadteQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VlyFEyP0SGnXVJM4njOrqZIFz5orSkFRv147DzVI/IcRtppq3g6bLlCgDvNKaL9BM tNHXYMooDJbdG4wwVmrHOitqNZ4BtBsV7JK7egL6jXHy59fic75wxzV/gKnmoQnRon fTVwsf/ZcRXjNV6Op9UTT6KCBGDk0WNu6Gpj7s6ILFecNDcDkeoPgLEBWlidCQy9nW kS7jSIFJjvrQk2mMY/Q0im/qv8QNpafx3VRDBcbfwVrJH8xrhQKgzQ0kNiJ9lG9Icw b7dfIn55zdteGscYHl0jNB4oZasYE5ioEtrx5ForviezQTTT0KY44mYyqwHZ4lfAU8 ELoqmJDU1bjJg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Hamza Mahfooz , Roman Li , Harry Wentland , Alex Deucher , Sasha Levin , maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.0 11/73] drm/edid: add a quirk for two LG monitors to get them to work on 10bpc Date: Sun, 18 Dec 2022 11:06:39 -0500 Message-Id: <20221218160741.927862-11-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221218160741.927862-1-sashal@kernel.org> References: <20221218160741.927862-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Hamza Mahfooz [ Upstream commit aa193f7eff8ff753577351140b8af13b76cdc7c2 ] The LG 27GP950 and LG 27GN950 have visible display corruption when trying to use 10bpc modes. So, to fix this, cap their maximum DSC target bitrate to 15bpp. Suggested-by: Roman Li Reviewed-by: Harry Wentland Signed-off-by: Hamza Mahfooz Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/drm_edid.c | 12 ++++++++++++ include/drm/drm_connector.h | 6 ++++++ 2 files changed, 18 insertions(+) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index eaa819381281..fefcfac999d9 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -87,6 +87,8 @@ static int oui(u8 first, u8 second, u8 third) #define EDID_QUIRK_FORCE_10BPC (1 << 11) /* Non desktop display (i.e. HMD) */ #define EDID_QUIRK_NON_DESKTOP (1 << 12) +/* Cap the DSC target bitrate to 15bpp */ +#define EDID_QUIRK_CAP_DSC_15BPP (1 << 13) #define MICROSOFT_IEEE_OUI 0xca125c @@ -147,6 +149,12 @@ static const struct edid_quirk { EDID_QUIRK('F', 'C', 'M', 13600, EDID_QUIRK_PREFER_LARGE_75 | EDID_QUIRK_DETAILED_IN_CM), + /* LG 27GP950 */ + EDID_QUIRK('G', 'S', 'M', 0x5bbf, EDID_QUIRK_CAP_DSC_15BPP), + + /* LG 27GN950 */ + EDID_QUIRK('G', 'S', 'M', 0x5b9a, EDID_QUIRK_CAP_DSC_15BPP), + /* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */ EDID_QUIRK('L', 'G', 'D', 764, EDID_QUIRK_FORCE_10BPC), @@ -6116,6 +6124,7 @@ static void drm_reset_display_info(struct drm_connector *connector) info->mso_stream_count = 0; info->mso_pixel_overlap = 0; + info->max_dsc_bpp = 0; } static u32 update_display_info(struct drm_connector *connector, @@ -6202,6 +6211,9 @@ static u32 update_display_info(struct drm_connector *connector, info->non_desktop = true; } + if (quirks & EDID_QUIRK_CAP_DSC_15BPP) + info->max_dsc_bpp = 15; + return quirks; } diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 7df7876b2ad5..d9879fc9ceb1 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -635,6 +635,12 @@ struct drm_display_info { * @mso_pixel_overlap: eDP MSO segment pixel overlap, 0-8 pixels. */ u8 mso_pixel_overlap; + + /** + * @max_dsc_bpp: Maximum DSC target bitrate, if it is set to 0 the + * monitor's default value is used instead. + */ + u32 max_dsc_bpp; }; int drm_display_info_set_bus_formats(struct drm_display_info *info, -- 2.35.1