From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Hector Martin <marcan@marcan.st>, Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Atish Patra <atishp@atishpatra.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
asahi@lists.linux.dev, Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v16 8/9] irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers
Date: Tue, 3 Jan 2023 19:42:20 +0530 [thread overview]
Message-ID: <20230103141221.772261-9-apatel@ventanamicro.com> (raw)
In-Reply-To: <20230103141221.772261-1-apatel@ventanamicro.com>
We add empty irq_eoi() in RISC-V INTC driver for child irqchip
drivers (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) which
implement chained handlers for parent per-HART local interrupts.
This hels us avoid unnecessary mask/unmask of per-HART local
interrupts at the time of handling interrupts.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/irqchip/irq-riscv-intc.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index 784d25645704..f229e3e66387 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -46,10 +46,27 @@ static void riscv_intc_irq_unmask(struct irq_data *d)
csr_set(CSR_IE, BIT(d->hwirq));
}
+static void riscv_intc_irq_eoi(struct irq_data *d)
+{
+ /*
+ * The RISC-V INTC driver uses handle_percpu_devid_irq() flow
+ * for the per-HART local interrupts and child irqchip drivers
+ * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement
+ * chained handlers for the per-HART local interrupts.
+ *
+ * In the absence of irq_eoi(), the chained_irq_enter() and
+ * chained_irq_exit() functions (used by child irqchip drivers)
+ * will do unnecessary mask/unmask of per-HART local interrupts
+ * at the time of handling interrupts. To avoid this, we provide
+ * an empty irq_eoi() callback for RISC-V INTC irqchip.
+ */
+}
+
static struct irq_chip riscv_intc_chip = {
.name = "RISC-V INTC",
.irq_mask = riscv_intc_irq_mask,
.irq_unmask = riscv_intc_irq_unmask,
+ .irq_eoi = riscv_intc_irq_eoi,
};
static int riscv_intc_domain_map(struct irq_domain *d, unsigned int irq,
--
2.34.1
next prev parent reply other threads:[~2023-01-03 14:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-03 14:12 [PATCH v16 0/9] RISC-V IPI Improvements Anup Patel
2023-01-03 14:12 ` [PATCH v16 1/9] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel
2023-01-03 14:12 ` [PATCH v16 2/9] irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode Anup Patel
2023-01-03 14:12 ` [PATCH v16 3/9] genirq: Add mechanism to multiplex a single HW IPI Anup Patel
2023-02-05 11:29 ` [irqchip: irq/irqchip-next] " irqchip-bot for Anup Patel
2023-01-03 14:12 ` [PATCH v16 4/9] RISC-V: Treat IPIs as normal Linux IRQs Anup Patel
2023-01-03 14:12 ` [PATCH v16 5/9] RISC-V: Allow marking IPIs as suitable for remote FENCEs Anup Patel
2023-01-03 14:12 ` [PATCH v16 6/9] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel
2023-01-03 14:12 ` [PATCH v16 7/9] RISC-V: Use IPIs for remote icache " Anup Patel
2023-01-03 14:12 ` Anup Patel [this message]
2023-01-03 14:12 ` [PATCH v16 9/9] irqchip/apple-aic: Move over to core ipi-mux Anup Patel
2023-02-05 11:29 ` [irqchip: irq/irqchip-next] " irqchip-bot for Marc Zyngier
2023-01-12 12:17 ` [PATCH v16 0/9] RISC-V IPI Improvements Anup Patel
2023-01-20 3:29 ` Anup Patel
2023-02-05 11:04 ` Marc Zyngier
2023-02-15 3:17 ` Palmer Dabbelt
2023-02-20 8:35 ` Marc Zyngier
2023-02-20 9:50 ` Anup Patel
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