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From: "Björn Töpel" <bjorn@kernel.org>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org
Cc: "Björn Töpel" <bjorn@rivosinc.com>,
	"Andreas Schwab" <schwab@linux-m68k.org>,
	"Geert Uytterhoeven" <geert@linux-m68k.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v3 2/2] scripts/decodecode: Add support for RISC-V
Date: Thu, 19 Jan 2023 08:47:38 +0100	[thread overview]
Message-ID: <20230119074738.708301-3-bjorn@kernel.org> (raw)
In-Reply-To: <20230119074738.708301-1-bjorn@kernel.org>

From: Björn Töpel <bjorn@rivosinc.com>

RISC-V has some GNU disassembly quirks, e.g. it requires '-D' to
properly disassemble .2byte directives similar to Arm [1]. Further,
GNU objdump groups RISC-V instruction by 2 or 4 byte chunks, instead
doing byte-for-byte.

Add the required switches, and translate from short/word to bytes when
ARCH is "riscv".

An example how to invoke decodecode for RISC-V:
  $ echo 'Code: bf45 f793 1007 f7d9 50ef 37af d541 b7d9 7097 00c8 (80e7)
  6140' | AFLAGS="-march=rv64imac_zicbom_zihintpause"  \
  ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- ./scripts/decodecode
  Code: bf45 f793 1007 f7d9 50ef 37af d541 b7d9 7097 00c8 (80e7) 6140
  All code
  ========
     0:   bf45                    c.j     0xffffffffffffffb0
     2:   1007f793                andi    a5,a5,256
     6:   f7d9                    c.bnez  a5,0xffffffffffffff94
     8:   37af50ef                jal     ra,0xf5382
     c:   d541                    c.beqz  a0,0xffffffffffffff94
     e:   b7d9                    c.j     0xffffffffffffffd4
    10:   00c87097                auipc   ra,0xc87
    14:*  614080e7                jalr    ra,1556(ra) # 0xc87624          <-- trapping instruction

  Code starting with the faulting instruction
  ===========================================
     0:   614080e7                jalr    ra,1556(ra)

[1] https://sourceware.org/bugzilla/show_bug.cgi?id=10263

Signed-off-by: Björn Töpel <bjorn@rivosinc.com>
---
 scripts/decodecode | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/scripts/decodecode b/scripts/decodecode
index b28fd2686561..8fe71c292381 100755
--- a/scripts/decodecode
+++ b/scripts/decodecode
@@ -93,6 +93,11 @@ disas() {
 		${CROSS_COMPILE}strip $t.o
 	fi
 
+	if [ "$ARCH" = "riscv" ]; then
+		OBJDUMPFLAGS="-M no-aliases --section=.text -D"
+		${CROSS_COMPILE}strip $t.o
+	fi
+
 	if [ $pc_sub -ne 0 ]; then
 		if [ $PC ]; then
 			adj_vma=$(( $PC - $pc_sub ))
@@ -126,8 +131,13 @@ get_substr_opcode_bytes_num()
 	do
 		substr+="$opc"
 
+		opcode="$substr"
+		if [ "$ARCH" = "riscv" ]; then
+			opcode=$(echo $opcode | tr ' ' '\n' | tac | tr -d '\n')
+		fi
+
 		# return if opcode bytes do not match @opline anymore
-		if ! echo $opline | grep -q "$substr";
+		if ! echo $opline | grep -q "$opcode";
 		then
 			break
 		fi
-- 
2.37.2


  parent reply	other threads:[~2023-01-19  7:51 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-19  7:47 [PATCH v3 0/2] riscv: Dump faulting instructions in oops handler Björn Töpel
2023-01-19  7:47 ` [PATCH v3 1/2] riscv: Add instruction dump to RISC-V splats Björn Töpel
2023-01-19  7:47 ` Björn Töpel [this message]
2023-02-21 15:18   ` [PATCH v3 2/2] scripts/decodecode: Add support for RISC-V Alexandre Ghiti
2023-02-22 15:00 ` [PATCH v3 0/2] riscv: Dump faulting instructions in oops handler patchwork-bot+linux-riscv

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