[PATCH v6 8/9] ARM: nspire: Use syscon-reboot to handle restart

Andrew Davis
2023-03-08T20:19:15Z

Writing this bit can be handled by the DT syscon-reboot driver.
Enable that driver and remove the machine_desc version.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Fabian Vogt <fabian@ritter-vogt.de>
Reviewed-by: Fabian Vogt <fabian@ritter-vogt.de>
---
arch/arm/mach-nspire/Kconfig | 2 ++
arch/arm/mach-nspire/mmio.h | 3 ---
arch/arm/mach-nspire/nspire.c | 10 ----------
3 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig
index b7a3871876d7..0ffdcaca1e6b 100644
--- a/arch/arm/mach-nspire/Kconfig
+++ b/arch/arm/mach-nspire/Kconfig
@@ -9,5 +9,7 @@ config ARCH_NSPIRE
select ARM_VIC
select ARM_TIMER_SP804
select NSPIRE_TIMER
+ select POWER_RESET
+ select POWER_RESET_SYSCON
help
This enables support for systems using the TI-NSPIRE CPU
diff --git a/arch/arm/mach-nspire/mmio.h b/arch/arm/mach-nspire/mmio.h
index 48e32f13f311..2ce0656139ec 100644
--- a/arch/arm/mach-nspire/mmio.h
+++ b/arch/arm/mach-nspire/mmio.h
@@ -5,9 +5,6 @@
* Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
*/

-#define NSPIRE_MISC_PHYS_BASE 0x900A0000
-#define NSPIRE_MISC_HWRESET 0x08
-
#define NSPIRE_PWR_PHYS_BASE 0x900B0000
#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000
#define NSPIRE_PWR_BUS_DISABLE1 0x18
diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c
index 2d4abb0288b9..1e13337972dd 100644
--- a/arch/arm/mach-nspire/nspire.c
+++ b/arch/arm/mach-nspire/nspire.c
@@ -27,16 +27,6 @@ static const char *const nspire_dt_match[] __initconst = {
NULL,
};

-static void nspire_restart(enum reboot_mode mode, const char *cmd)
-{
- void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
- if (!base)
- return;
-
- writel(2, base + NSPIRE_MISC_HWRESET);
-}
-
DT_MACHINE_START(NSPIRE, "TI-NSPIRE")
.dt_compat = nspire_dt_match,
- .restart = nspire_restart,
MACHINE_END
--
2.39.2