[PATCH v2 06/23] arm64: dts: colibri-imx8x: Split pinctrl_hog1

Philippe Schenker
2023-03-14T10:27:13Z

Split pinctrl_hog1 into a second group so CSI_MCLK can be muxed to a
gpio on its own.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---

(no changes since v1)

arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index a352246aa1f3..10dce84dc153 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -119,7 +119,8 @@ &usdhc2 {

&iomuxc {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>;
+ pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
+ <&pinctrl_hog2>;

/* On-module touch pen-down interrupt */
pinctrl_ad7879_int: ad7879intgrp {
@@ -253,6 +254,10 @@ pinctrl_hog1: hog1grp {
<IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */
};

+ pinctrl_hog2: hog2grp {
+ fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20>; /* SODIMM 75 */
+ };
+
/*
* This pin is used in the SCFW as a UART. Using it from
* Linux would require rewritting the SCFW board file.
--
2.39.2