From: "David E. Box" <david.e.box@linux.intel.com>
To: irenic.rajneesh@gmail.com, david.e.box@linux.intel.com,
hdegoede@redhat.com, markgross@kernel.org,
andy.shevchenko@gmail.com, rajvi.jingar@linux.intel.com,
xi.pardee@intel.com
Cc: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org
Subject: [PATCH 02/11] platform/x86/intel/vsec: Explicitly enable capabilities
Date: Wed, 15 Mar 2023 11:33:56 -0700 [thread overview]
Message-ID: <20230315183405.2465630-3-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20230315183405.2465630-1-david.e.box@linux.intel.com>
Any discovered Intel VSEC/DVSEC capabilities are enabled by default and
only get disabled by quirk. Instead, remove such quirks and only enable
support for capabilities that have been explicitly added to a new
capabilities field. While here, also reorder the device info structures
alphabetically.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
---
drivers/platform/x86/intel/vsec.c | 65 +++++++++++++------------------
drivers/platform/x86/intel/vsec.h | 11 +++++-
2 files changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel/vsec.c
index a22354ee6ce3..0d5cf250e288 100644
--- a/drivers/platform/x86/intel/vsec.c
+++ b/drivers/platform/x86/intel/vsec.c
@@ -32,14 +32,6 @@ static DEFINE_IDA(intel_vsec_ida);
static DEFINE_IDA(intel_vsec_sdsi_ida);
static DEFINE_XARRAY_ALLOC(auxdev_array);
-static enum intel_vsec_id intel_vsec_allow_list[] = {
- VSEC_ID_TELEMETRY,
- VSEC_ID_WATCHER,
- VSEC_ID_CRASHLOG,
- VSEC_ID_SDSI,
- VSEC_ID_TPMI,
-};
-
static const char *intel_vsec_name(enum intel_vsec_id id)
{
switch (id) {
@@ -63,26 +55,19 @@ static const char *intel_vsec_name(enum intel_vsec_id id)
}
}
-static bool intel_vsec_allowed(u16 id)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(intel_vsec_allow_list); i++)
- if (intel_vsec_allow_list[i] == id)
- return true;
-
- return false;
-}
-
-static bool intel_vsec_disabled(u16 id, unsigned long quirks)
+static bool intel_vsec_supported(u16 id, unsigned long caps)
{
switch (id) {
+ case VSEC_ID_TELEMETRY:
+ return !!(caps & VSEC_CAP_TELEMETRY);
case VSEC_ID_WATCHER:
- return !!(quirks & VSEC_QUIRK_NO_WATCHER);
-
+ return !!(caps & VSEC_CAP_WATCHER);
case VSEC_ID_CRASHLOG:
- return !!(quirks & VSEC_QUIRK_NO_CRASHLOG);
-
+ return !!(caps & VSEC_CAP_CRASHLOG);
+ case VSEC_ID_SDSI:
+ return !!(caps & VSEC_CAP_SDSI);
+ case VSEC_ID_TPMI:
+ return !!(caps & VSEC_CAP_TPMI);
default:
return false;
}
@@ -170,7 +155,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
unsigned long quirks = info->quirks;
int i;
- if (!intel_vsec_allowed(header->id) || intel_vsec_disabled(header->id, quirks))
+ if (!intel_vsec_supported(header->id, info->caps))
return -EINVAL;
if (!header->num_entries) {
@@ -234,14 +219,14 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
static bool intel_vsec_walk_header(struct pci_dev *pdev,
struct intel_vsec_platform_info *info)
{
- struct intel_vsec_header **header = info->capabilities;
+ struct intel_vsec_header **header = info->headers;
bool have_devices = false;
int ret;
for ( ; *header; header++) {
ret = intel_vsec_add_dev(pdev, *header, info);
if (ret)
- dev_info(&pdev->dev, "Could not add device for DVSEC id %d\n",
+ dev_info(&pdev->dev, "Could not add device for VSEC id %d\n",
(*header)->id);
else
have_devices = true;
@@ -386,12 +371,6 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_device_id
return 0;
}
-/* TGL info */
-static const struct intel_vsec_platform_info tgl_info = {
- .quirks = VSEC_QUIRK_NO_WATCHER | VSEC_QUIRK_NO_CRASHLOG |
- VSEC_QUIRK_TABLE_SHIFT | VSEC_QUIRK_EARLY_HW,
-};
-
/* DG1 info */
static struct intel_vsec_header dg1_telemetry = {
.length = 0x10,
@@ -402,19 +381,31 @@ static struct intel_vsec_header dg1_telemetry = {
.offset = 0x466000,
};
-static struct intel_vsec_header *dg1_capabilities[] = {
+static struct intel_vsec_header *dg1_headers[] = {
&dg1_telemetry,
NULL
};
static const struct intel_vsec_platform_info dg1_info = {
- .capabilities = dg1_capabilities,
+ .caps = VSEC_CAP_TELEMETRY,
+ .headers = dg1_headers,
.quirks = VSEC_QUIRK_NO_DVSEC | VSEC_QUIRK_EARLY_HW,
};
/* MTL info */
static const struct intel_vsec_platform_info mtl_info = {
- .quirks = VSEC_QUIRK_NO_WATCHER | VSEC_QUIRK_NO_CRASHLOG,
+ .caps = VSEC_CAP_TELEMETRY,
+};
+
+/* OOBMSM info */
+static const struct intel_vsec_platform_info oobmsm_info = {
+ .caps = VSEC_CAP_TELEMETRY | VSEC_CAP_SDSI | VSEC_CAP_TPMI,
+};
+
+/* TGL info */
+static const struct intel_vsec_platform_info tgl_info = {
+ .caps = VSEC_CAP_TELEMETRY,
+ .quirks = VSEC_QUIRK_TABLE_SHIFT | VSEC_QUIRK_EARLY_HW,
};
#define PCI_DEVICE_ID_INTEL_VSEC_ADL 0x467d
@@ -429,7 +420,7 @@ static const struct pci_device_id intel_vsec_pci_ids[] = {
{ PCI_DEVICE_DATA(INTEL, VSEC_DG1, &dg1_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_MTL_M, &mtl_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_MTL_S, &mtl_info) },
- { PCI_DEVICE_DATA(INTEL, VSEC_OOBMSM, &(struct intel_vsec_platform_info) {}) },
+ { PCI_DEVICE_DATA(INTEL, VSEC_OOBMSM, &oobmsm_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_RPL, &tgl_info) },
{ PCI_DEVICE_DATA(INTEL, VSEC_TGL, &tgl_info) },
{ }
diff --git a/drivers/platform/x86/intel/vsec.h b/drivers/platform/x86/intel/vsec.h
index f600d6fe0830..54fdea93f762 100644
--- a/drivers/platform/x86/intel/vsec.h
+++ b/drivers/platform/x86/intel/vsec.h
@@ -61,9 +61,18 @@ enum intel_vsec_quirks {
VSEC_QUIRK_EARLY_HW = BIT(4),
};
+enum intel_vsec_capabilities {
+ VSEC_CAP_TELEMETRY = BIT(0),
+ VSEC_CAP_WATCHER = BIT(1),
+ VSEC_CAP_CRASHLOG = BIT(2),
+ VSEC_CAP_SDSI = BIT(3),
+ VSEC_CAP_TPMI = BIT(4),
+};
+
/* Platform specific data */
struct intel_vsec_platform_info {
- struct intel_vsec_header **capabilities;
+ struct intel_vsec_header **headers;
+ unsigned long caps;
unsigned long quirks;
};
--
2.34.1
next prev parent reply other threads:[~2023-03-15 18:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-15 18:33 [PATCH 00/11] Intel pmc_core: Enable telemetry David E. Box
2023-03-15 18:33 ` [PATCH 01/11] platform/x86/intel/vsec: Add intel_vsec_register David E. Box
2023-03-15 18:33 ` David E. Box [this message]
2023-03-15 18:33 ` [PATCH 03/11] platform/x86/intel/vsec: Add base address field David E. Box
2023-03-15 18:33 ` [PATCH 04/11] platform/x86/intel/pmt: Add INTEL_PMT module namespace David E. Box
2023-03-15 18:33 ` [PATCH 05/11] platform/x86/intel/pmt: telemetry: Add telemetry read functions David E. Box
2023-03-15 18:34 ` [PATCH 06/11] platform/x86/intel/pmt/telemetry: Add driver version David E. Box
2023-03-15 18:34 ` [PATCH 07/11] platform/x86/intel/pmc: Alder Lake slp_s0_residency fix David E. Box
2023-03-15 18:34 ` [PATCH 08/11] platform/x86:intel/pmc: Combine core_init and core_configure function David E. Box
2023-03-15 18:34 ` [PATCH 09/11] platform/x86/intel/pmc: Add Intel PMT support for MTL PMC David E. Box
2023-03-15 18:34 ` [PATCH 10/11] platform/x86:intel/pmc: Move get_low_power_modes function David E. Box
2023-03-15 18:34 ` [PATCH 11/11] platform/x86/intel/pmc/mtl: get LPM information using Intel PMT David E. Box
2023-03-16 14:51 ` [PATCH 00/11] Intel pmc_core: Enable telemetry Hans de Goede
2023-03-16 15:36 ` David E. Box
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