From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0EBFEC76195 for ; Fri, 24 Mar 2023 19:21:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231777AbjCXTVZ (ORCPT ); Fri, 24 Mar 2023 15:21:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231630AbjCXTVP (ORCPT ); Fri, 24 Mar 2023 15:21:15 -0400 Received: from mail-yw1-x1131.google.com (mail-yw1-x1131.google.com [IPv6:2607:f8b0:4864:20::1131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46A001C7F4 for ; Fri, 24 Mar 2023 12:21:14 -0700 (PDT) Received: by mail-yw1-x1131.google.com with SMTP id 00721157ae682-5416698e889so51241217b3.2 for ; Fri, 24 Mar 2023 12:21:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679685673; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kriTaZfC9ovCIlPEYngC+XavDN/MNyeHVaA952htTr0=; b=D/f17MqNnV08X0yQrGHv1SlryT/UYPReNVQHdOQNG+QVrFf9xgkyb9QG3vKzufNBeQ r8lS6oqraXmEW6NHl+gEvO+5enVBjbr4+SXCvnJtRS68ZWDEj5oV41Zth5ASVMTBCibO md7DooVkUo+9V6XNgu2bbAljC7YSD5Ai1msvg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679685673; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kriTaZfC9ovCIlPEYngC+XavDN/MNyeHVaA952htTr0=; b=mFIU/qfeDln6+EPmHuIBGw48XnH+x6Elme1VNYTOeMnjIMAdajQRA3GJVaYaZWq8Cv Bb1+cPbLOwgHAjilGr5WOred43Kg0SGywlec9sYEvHUvqBZqFORkdlIlvglhswH76/XP Ei+qBmd1EVo3x2krFABPBMdWSFIF6BpSAkl3rwtBBuSPo6Ago/Cj2m8ZEIvpIgwiqoAh Cj3VEgwzduUvwx8aAf9lm1PrzNCdYzz2Om+z59E9o2+PWTp6WuOOxNTL25MjswXcr/pP /TiPOWeP7tjuxvQtuNSHUVukl1aSI6RqCwR2Gi42KnkM0e1Iiyp3lJ4VHNnEktjWl2FK WUow== X-Gm-Message-State: AAQBX9eCuxukVXtd55qmBI6Zzjh9L2zKpxzOTdHYRdQwrpZCCfD1D2He CO4s6aR3LEo/01n1oOhzjuPUXA== X-Google-Smtp-Source: AKy350afT9hrwEG8carjvps+pj765hr/qLG0qs2/ckyUHSxqaqRIpxIZedjpTB9ZgzMQXJbvASL+TQ== X-Received: by 2002:a81:5d8a:0:b0:544:528d:a28d with SMTP id r132-20020a815d8a000000b00544528da28dmr3242219ywb.1.1679685673451; Fri, 24 Mar 2023 12:21:13 -0700 (PDT) Received: from localhost ([2620:0:1035:15:5509:ec45:2b32:b39f]) by smtp.gmail.com with UTF8SMTPSA id x15-20020a81f90f000000b00545a08184ebsm575818ywm.123.2023.03.24.12.21.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Mar 2023 12:21:13 -0700 (PDT) From: Mark Yacoub X-Google-Original-From: Mark Yacoub To: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter Cc: seanpaul@chromium.org, suraj.kandpal@intel.com, dianders@chromium.org, Jani Nikula , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 05/10] drm/i915/hdcp: Consolidate HDCP setup/state cache Date: Fri, 24 Mar 2023 15:20:52 -0400 Message-Id: <20230324192058.3916571-6-markyacoub@google.com> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230324192058.3916571-1-markyacoub@google.com> References: <20230324192058.3916571-1-markyacoub@google.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Paul Stick all of the setup for HDCP into a dedicated function. No functional change, but this will facilitate moving HDCP logic into helpers. Acked-by: Jani Nikula Reviewed-by: Rodrigo Vivi Signed-off-by: Sean Paul --- Changes in v2: -None Changes in v3: -None Changes in v4: -None Changes in v5: -None Changes in v6: -None Changes in v7: - None drivers/gpu/drm/i915/display/intel_hdcp.c | 52 +++++++++++++++-------- 1 file changed, 35 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 396d2cef000aa..0a20bc41be55d 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -2190,6 +2190,37 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder) } } +static int +_intel_hdcp_setup(struct intel_connector *connector, + const struct intel_crtc_state *pipe_config, u8 content_type) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct intel_hdcp *hdcp = &connector->hdcp; + int ret = 0; + + if (!connector->encoder) { + drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n", + connector->base.name, connector->base.base.id); + return -ENODEV; + } + + hdcp->content_type = content_type; + + if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { + hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; + hdcp->stream_transcoder = pipe_config->cpu_transcoder; + } else { + hdcp->cpu_transcoder = pipe_config->cpu_transcoder; + hdcp->stream_transcoder = INVALID_TRANSCODER; + } + + if (DISPLAY_VER(dev_priv) >= 12) + dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder); + + return ret; +} + static int initialize_hdcp_port_data(struct intel_connector *connector, struct intel_digital_port *dig_port, const struct intel_hdcp_shim *shim) @@ -2329,28 +2360,14 @@ int intel_hdcp_enable(struct intel_connector *connector, if (!hdcp->shim) return -ENOENT; - if (!connector->encoder) { - drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n", - connector->base.name, connector->base.base.id); - return -ENODEV; - } - mutex_lock(&hdcp->mutex); mutex_lock(&dig_port->hdcp_mutex); drm_WARN_ON(&dev_priv->drm, hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED); - hdcp->content_type = content_type; - - if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { - hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; - hdcp->stream_transcoder = pipe_config->cpu_transcoder; - } else { - hdcp->cpu_transcoder = pipe_config->cpu_transcoder; - hdcp->stream_transcoder = INVALID_TRANSCODER; - } - if (DISPLAY_VER(dev_priv) >= 12) - dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder); + ret = _intel_hdcp_setup(connector, pipe_config, content_type); + if (ret) + goto out; /* * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup @@ -2378,6 +2395,7 @@ int intel_hdcp_enable(struct intel_connector *connector, true); } +out: mutex_unlock(&dig_port->hdcp_mutex); mutex_unlock(&hdcp->mutex); return ret; -- 2.40.0.348.gf938b09366-goog