From: Jacob Pan <jacob.jun.pan@linux.intel.com>
To: Baolu Lu <baolu.lu@linux.intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
iommu@lists.linux.dev, Jason Gunthorpe <jgg@nvidia.com>,
Joerg Roedel <joro@8bytes.org>,
dmaengine@vger.kernel.org, vkoul@kernel.org,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
Raj Ashok <ashok.raj@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Tony Luck <tony.luck@intel.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>,
jacob.jun.pan@linux.intel.com
Subject: Re: [PATCH v2 4/8] iommu/vt-d: Reserve RID_PASID from global SVA PASID space
Date: Tue, 28 Mar 2023 13:52:00 -0700 [thread overview]
Message-ID: <20230328135200.139f280a@jacob-builder> (raw)
In-Reply-To: <20230328092919.372f0545@jacob-builder>
Hi Baolu,
On Tue, 28 Mar 2023 09:29:19 -0700, Jacob Pan
<jacob.jun.pan@linux.intel.com> wrote:
> > > On VT-d platforms, RID_PASID is used for DMA request without PASID. We
> > > should not treat RID_PASID special instead let it be allocated from
> > > the global SVA PASID number space.
> >
> > It's same to AMD and ARM SMMUv3, right? They also need an explicit
> > reservation of PASID 0.
> >
> yes, all IOMMU drivers need to do that. I will give it a try but might
> need help to place the call.
It might be simpler to just let SVA code allocate from 1 up instead of 0
(as is in the current code). Global PASID allocator would still allow the
full range from 0 to max. Then there is no change to architectures that
don't support non-zero RID_PASID. For VT-d, it would still work in the
future when we have nonzero RID_PASID. is that reasonable?
Thanks,
Jacob
next prev parent reply other threads:[~2023-03-28 20:48 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 23:21 [PATCH v2 0/8] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-03-27 23:21 ` [PATCH v2 1/8] iommu/vt-d: Use non-privileged mode for all PASIDs Jacob Pan
2023-03-28 4:55 ` Baolu Lu
2023-03-27 23:21 ` [PATCH v2 2/8] iommu/vt-d: Remove PASID supervisor request support Jacob Pan
2023-03-28 4:59 ` Baolu Lu
2023-03-27 23:21 ` [PATCH v2 3/8] iommu/sva: Support reservation of global SVA PASIDs Jacob Pan
2023-03-28 5:11 ` Baolu Lu
2023-03-28 15:21 ` Jacob Pan
2023-03-28 7:35 ` Tian, Kevin
2023-03-28 15:31 ` Jacob Pan
2023-03-28 15:55 ` Jason Gunthorpe
2023-03-28 16:32 ` Jacob Pan
2023-03-27 23:21 ` [PATCH v2 4/8] iommu/vt-d: Reserve RID_PASID from global SVA PASID space Jacob Pan
2023-03-28 5:20 ` Baolu Lu
2023-03-28 16:29 ` Jacob Pan
2023-03-28 20:52 ` Jacob Pan [this message]
2023-03-29 6:13 ` Baolu Lu
2023-03-29 8:20 ` Vasant Hegde
2023-03-27 23:21 ` [PATCH v2 5/8] iommu/vt-d: Make device pasid attachment explicit Jacob Pan
2023-03-28 5:49 ` Baolu Lu
2023-03-28 7:44 ` Tian, Kevin
2023-03-28 20:39 ` Jacob Pan
2023-03-29 6:18 ` Baolu Lu
2023-03-27 23:21 ` [PATCH v2 6/8] iommu/vt-d: Implement set_dev_pasid domain op Jacob Pan
2023-03-28 7:47 ` Tian, Kevin
2023-03-28 15:40 ` Jacob Pan
2023-03-29 3:04 ` Tian, Kevin
2023-03-29 6:22 ` Baolu Lu
2023-03-27 23:21 ` [PATCH v2 7/8] iommu: Export iommu_get_dma_domain Jacob Pan
2023-03-28 6:04 ` Baolu Lu
2023-03-28 7:52 ` Tian, Kevin
2023-03-28 15:48 ` Jacob Pan
2023-03-28 16:19 ` Jason Gunthorpe
2023-03-28 17:25 ` Jacob Pan
2023-03-28 15:48 ` Jacob Pan
2023-03-29 6:28 ` Baolu Lu
2023-03-27 23:21 ` [PATCH v2 8/8] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-03-28 18:16 ` Fenghua Yu
2023-03-28 20:23 ` Jacob Pan
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