Re: [PATCH 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space

Shawn Guo
2023-03-29T13:28:37Z

On Wed, Mar 29, 2023 at 01:06:11PM +0200, Konrad Dybcio wrote:
>
>
> On 29.03.2023 05:49, Shawn Guo wrote:
> > On Tue, Mar 28, 2023 at 12:02:53PM +0200, Konrad Dybcio wrote:
> >> The MPM hardware is accessible to us from the ARM CPUs through a shared
> >> memory region (RPM MSG RAM) that's also concurrently accessed by other
> >> kinds of cores on the system (like modem, ADSP etc.). Modeling this
> >> relation in a (somewhat) sane manner in the device tree basically
> >> requires us to either present the MPM as a child of said memory region
> >> (which makes little sense, as a mapped memory carveout is not a bus),
> >> define nodes which bleed their register spaces into one another, or
> >> passing their slice of the MSG RAM through some kind of a property.
> >>
> >> Go with the third option and add a way to map a region passed through
> >> the "qcom,rpm-msg-ram" property as our register space.
> >>
> >> The current way of using 'reg' is preserved for ABI reasons.
> >>
> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> >> ---
> >> drivers/irqchip/irq-qcom-mpm.c | 30 +++++++++++++++++++++++++-----
> >> 1 file changed, 25 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c
> >> index d30614661eea..6fe59f4deef4 100644
> >> --- a/drivers/irqchip/irq-qcom-mpm.c
> >> +++ b/drivers/irqchip/irq-qcom-mpm.c
> >> @@ -14,6 +14,7 @@
> >> #include <linux/mailbox_client.h>
> >> #include <linux/module.h>
> >> #include <linux/of.h>
> >> +#include <linux/of_address.h>
> >> #include <linux/of_device.h>
> >> #include <linux/platform_device.h>
> >> #include <linux/pm_domain.h>
> >> @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent)
> >> struct device *dev = &pdev->dev;
> >> struct irq_domain *parent_domain;
> >> struct generic_pm_domain *genpd;
> >> + struct device_node *msgram_np;
> >> struct qcom_mpm_priv *priv;
> >> unsigned int pin_cnt;
> >> + struct resource res;
> >> int i, irq;
> >> int ret;
> >>
> >> @@ -374,9 +377,21 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent)
> >>
> >> raw_spin_lock_init(&priv->lock);
> >>
> >> - priv->base = devm_platform_ioremap_resource(pdev, 0);
> >> - if (IS_ERR(priv->base))
> >> - return PTR_ERR(priv->base);
> >> + /* If we have a handle to an RPM message ram partition, use it. */
> >> + msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0);
> >> + if (msgram_np) {
> >> + ret = of_address_to_resource(msgram_np, 0, &res);
> >> + /* Don't use devm_ioremap_resource, as we're accessing a shared region. */
> >> + priv->base = ioremap(res.start, resource_size(&res));
> >
> > Are you suggesting that other cores/drivers will also need to access
> > the mpm slice below?
> >
> > apss_mpm: sram@1b8 {
> > reg = <0x1b8 0x48>;
> > };
> Yes, the RPM M3 core. Other slices may be accessed
> by any core at any time.

Hmm, let me reword my question. Other than irq-qcom-mpm, is there any
other Linux drivers that also need to request this slice region?
Otherwise, I do not understand why devm_ioremap_resource() cannot be
used.

Shawn