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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id fh5-20020a17090b034500b0023b5566f744sm311482pjb.39.2023.03.28.20.41.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 20:41:48 -0700 (PDT) Date: Wed, 29 Mar 2023 11:41:41 +0800 From: Shawn Guo To: Konrad Dybcio Cc: Andy Gross , Bjorn Andersson , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 1/2] dt-bindings: interrupt-controller: mpm: Allow passing reg through phandle Message-ID: <20230329034141.GB3554086@dragon> References: <20230328-topic-msgram_mpm-v1-0-1b788a5f5a33@linaro.org> <20230328-topic-msgram_mpm-v1-1-1b788a5f5a33@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230328-topic-msgram_mpm-v1-1-1b788a5f5a33@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 28, 2023 at 12:02:52PM +0200, Konrad Dybcio wrote: > Due to the wild nature of the Qualcomm RPM Message RAM, we can't really > use 'reg' to point to the MPM's slice of Message RAM without cutting into > an already-defined RPM MSG RAM node used for GLINK and SMEM. > > Document passing the register space as a slice of SRAM through the > qcom,rpm-msg-ram property. This also makes 'reg' no longer required. > > Signed-off-by: Konrad Dybcio > --- > .../devicetree/bindings/interrupt-controller/qcom,mpm.yaml | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml > index 509d20c091af..77fe5e0b378f 100644 > --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml > +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml > @@ -30,6 +30,11 @@ properties: > description: > Specifies the base address and size of vMPM registers in RPM MSG RAM. > > + qcom,rpm-msg-ram: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + Phandle to the APSS MPM slice of the RPM Message RAM > + > interrupts: > maxItems: 1 > description: > @@ -64,7 +69,6 @@ properties: > > required: > - compatible > - - reg It's not my call, but I wonder if we need to maintain the 'reg' ABI at all, as there is no DTS landed so far. In either case, I suggest we update the example to adopt the new way. Shawn > - interrupts > - mboxes > - interrupt-controller > > -- > 2.40.0 >