* [PATCH RFC v2 1/4] ARM: dts: oxnas: remove obsolete device tree files
2023-04-03 7:42 [PATCH RFC v2 0/4] ARM: oxnas support removal Neil Armstrong
@ 2023-04-03 7:42 ` Neil Armstrong
2023-04-03 7:42 ` [PATCH RFC v2 2/4] ARM: oxnas: remove OXNAS support Neil Armstrong
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2023-04-03 7:42 UTC (permalink / raw)
To: Arnd Bergmann, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-oxnas,
Neil Armstrong, Linus Walleij, Daniel Golle
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 devices.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm/boot/dts/Makefile | 3 -
arch/arm/boot/dts/ox810se-wd-mbwe.dts | 115 -------
arch/arm/boot/dts/ox810se.dtsi | 357 ---------------------
.../dts/ox820-cloudengines-pogoplug-series-3.dts | 93 ------
arch/arm/boot/dts/ox820.dtsi | 299 -----------------
5 files changed, 867 deletions(-)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index efe4152e5846..ad83faecfdc6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1033,9 +1033,6 @@ dtb-$(CONFIG_ARCH_PXA) += \
pxa300-raumfeld-speaker-m.dtb \
pxa300-raumfeld-speaker-one.dtb \
pxa300-raumfeld-speaker-s.dtb
-dtb-$(CONFIG_ARCH_OXNAS) += \
- ox810se-wd-mbwe.dtb \
- ox820-cloudengines-pogoplug-series-3.dtb
dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8016-sbc.dtb \
qcom-apq8026-asus-sparrow.dtb \
diff --git a/arch/arm/boot/dts/ox810se-wd-mbwe.dts b/arch/arm/boot/dts/ox810se-wd-mbwe.dts
deleted file mode 100644
index c59e06ff2423..000000000000
--- a/arch/arm/boot/dts/ox810se-wd-mbwe.dts
+++ /dev/null
@@ -1,115 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * wd-mbwe.dtsi - Device tree file for Western Digital My Book World Edition
- *
- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-#include "ox810se.dtsi"
-
-/ {
- model = "Western Digital My Book World Edition";
-
- compatible = "wd,mbwe", "oxsemi,ox810se";
-
- chosen {
- bootargs = "console=ttyS1,115200n8 earlyprintk=serial";
- };
-
- memory {
- /* 128Mbytes DDR */
- reg = <0x48000000 0x8000000>;
- };
-
- aliases {
- serial1 = &uart1;
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <100>;
-
- power {
- label = "power";
- gpios = <&gpio0 0 1>;
- linux,code = <0x198>;
- };
-
- recovery {
- label = "recovery";
- gpios = <&gpio0 4 1>;
- linux,code = <0xab>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- a0 {
- label = "activity0";
- gpios = <&gpio0 25 0>;
- default-state = "keep";
- };
-
- a1 {
- label = "activity1";
- gpios = <&gpio0 26 0>;
- default-state = "keep";
- };
-
- a2 {
- label = "activity2";
- gpios = <&gpio0 5 0>;
- default-state = "keep";
- };
-
- a3 {
- label = "activity3";
- gpios = <&gpio0 6 0>;
- default-state = "keep";
- };
-
- a4 {
- label = "activity4";
- gpios = <&gpio0 7 0>;
- default-state = "keep";
- };
-
- a5 {
- label = "activity5";
- gpios = <&gpio1 2 0>;
- default-state = "keep";
- };
- };
-
- i2c-gpio {
- compatible = "i2c-gpio";
- gpios = <&gpio0 3 0 /* sda */
- &gpio0 2 0 /* scl */
- >;
- i2c-gpio,delay-us = <2>; /* ~100 kHz */
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtc0: rtc@48 {
- compatible = "st,m41t00";
- reg = <0x68>;
- };
- };
-};
-
-ða {
- status = "okay";
-};
-
-&uart1 {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
-};
diff --git a/arch/arm/boot/dts/ox810se.dtsi b/arch/arm/boot/dts/ox810se.dtsi
deleted file mode 100644
index 96c0745f7b70..000000000000
--- a/arch/arm/boot/dts/ox810se.dtsi
+++ /dev/null
@@ -1,357 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * ox810se.dtsi - Device tree file for Oxford Semiconductor OX810SE SoC
- *
- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include <dt-bindings/clock/oxsemi,ox810se.h>
-#include <dt-bindings/reset/oxsemi,ox810se.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "oxsemi,ox810se";
-
- cpus {
- #address-cells = <0>;
- #size-cells = <0>;
-
- cpu {
- device_type = "cpu";
- compatible = "arm,arm926ej-s";
- clocks = <&armclk>;
- };
- };
-
- memory {
- device_type = "memory";
- /* Max 256MB @ 0x48000000 */
- reg = <0x48000000 0x10000000>;
- };
-
- clocks {
- osc: oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
-
- gmacclk: gmacclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- };
-
- rpsclk: rpsclk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <1>;
- clocks = <&osc>;
- };
-
- pll400: pll400 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <733333333>;
- };
-
- sysclk: sysclk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <4>;
- clock-mult = <1>;
- clocks = <&pll400>;
- };
-
- armclk: armclk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <2>;
- clock-mult = <1>;
- clocks = <&pll400>;
- };
- };
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges;
- interrupt-parent = <&intc>;
-
- etha: ethernet@40400000 {
- compatible = "oxsemi,ox810se-dwmac", "snps,dwmac";
- reg = <0x40400000 0x2000>;
- interrupts = <8>;
- interrupt-names = "macirq";
- mac-address = [000000000000]; /* Filled in by U-Boot */
- phy-mode = "rgmii";
-
- clocks = <&stdclk 6>, <&gmacclk>;
- clock-names = "gmac", "stmmaceth";
- resets = <&reset 6>;
-
- /* Regmap for sys registers */
- oxsemi,sys-ctrl = <&sys>;
-
- status = "disabled";
- };
-
- apb-bridge@44000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges = <0 0x44000000 0x1000000>;
-
- pinctrl: pinctrl {
- compatible = "oxsemi,ox810se-pinctrl";
-
- /* Regmap for sys registers */
- oxsemi,sys-ctrl = <&sys>;
-
- pinctrl_uart0: uart0 {
- uart0a {
- pins = "gpio31";
- function = "fct3";
- };
- uart0b {
- pins = "gpio32";
- function = "fct3";
- };
- };
-
- pinctrl_uart0_modem: uart0_modem {
- uart0c {
- pins = "gpio27";
- function = "fct3";
- };
- uart0d {
- pins = "gpio28";
- function = "fct3";
- };
- uart0e {
- pins = "gpio29";
- function = "fct3";
- };
- uart0f {
- pins = "gpio30";
- function = "fct3";
- };
- uart0g {
- pins = "gpio33";
- function = "fct3";
- };
- uart0h {
- pins = "gpio34";
- function = "fct3";
- };
- };
-
- pinctrl_uart1: uart1 {
- uart1a {
- pins = "gpio20";
- function = "fct3";
- };
- uart1b {
- pins = "gpio22";
- function = "fct3";
- };
- };
-
- pinctrl_uart1_modem: uart1_modem {
- uart1c {
- pins = "gpio8";
- function = "fct3";
- };
- uart1d {
- pins = "gpio9";
- function = "fct3";
- };
- uart1e {
- pins = "gpio23";
- function = "fct3";
- };
- uart1f {
- pins = "gpio24";
- function = "fct3";
- };
- uart1g {
- pins = "gpio25";
- function = "fct3";
- };
- uart1h {
- pins = "gpio26";
- function = "fct3";
- };
- };
-
- pinctrl_uart2: uart2 {
- uart2a {
- pins = "gpio6";
- function = "fct3";
- };
- uart2b {
- pins = "gpio7";
- function = "fct3";
- };
- };
-
- pinctrl_uart2_modem: uart2_modem {
- uart2c {
- pins = "gpio0";
- function = "fct3";
- };
- uart2d {
- pins = "gpio1";
- function = "fct3";
- };
- uart2e {
- pins = "gpio2";
- function = "fct3";
- };
- uart2f {
- pins = "gpio3";
- function = "fct3";
- };
- uart2g {
- pins = "gpio4";
- function = "fct3";
- };
- uart2h {
- pins = "gpio5";
- function = "fct3";
- };
- };
- };
-
- gpio0: gpio@0 {
- compatible = "oxsemi,ox810se-gpio";
- reg = <0x000000 0x100000>;
- interrupts = <21>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- ngpios = <32>;
- oxsemi,gpio-bank = <0>;
- gpio-ranges = <&pinctrl 0 0 32>;
- };
-
- gpio1: gpio@100000 {
- compatible = "oxsemi,ox810se-gpio";
- reg = <0x100000 0x100000>;
- interrupts = <22>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- ngpios = <3>;
- oxsemi,gpio-bank = <1>;
- gpio-ranges = <&pinctrl 0 32 3>;
- };
-
- uart0: serial@200000 {
- compatible = "ns16550a";
- reg = <0x200000 0x100000>;
- clocks = <&sysclk>;
- interrupts = <23>;
- reg-shift = <0>;
- fifo-size = <16>;
- reg-io-width = <1>;
- current-speed = <115200>;
- no-loopback-test;
- status = "disabled";
- resets = <&reset RESET_UART1>;
- };
-
- uart1: serial@300000 {
- compatible = "ns16550a";
- reg = <0x300000 0x100000>;
- clocks = <&sysclk>;
- interrupts = <24>;
- reg-shift = <0>;
- fifo-size = <16>;
- reg-io-width = <1>;
- current-speed = <115200>;
- no-loopback-test;
- status = "disabled";
- resets = <&reset RESET_UART2>;
- };
-
- uart2: serial@900000 {
- compatible = "ns16550a";
- reg = <0x900000 0x100000>;
- clocks = <&sysclk>;
- interrupts = <29>;
- reg-shift = <0>;
- fifo-size = <16>;
- reg-io-width = <1>;
- current-speed = <115200>;
- no-loopback-test;
- status = "disabled";
- resets = <&reset RESET_UART3>;
- };
-
- uart3: serial@a00000 {
- compatible = "ns16550a";
- reg = <0xa00000 0x100000>;
- clocks = <&sysclk>;
- interrupts = <30>;
- reg-shift = <0>;
- fifo-size = <16>;
- reg-io-width = <1>;
- current-speed = <115200>;
- no-loopback-test;
- status = "disabled";
- resets = <&reset RESET_UART4>;
- };
- };
-
- apb-bridge@45000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges = <0 0x45000000 0x1000000>;
-
- sys: sys-ctrl@0 {
- compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";
- reg = <0x000000 0x100000>;
-
- reset: reset-controller {
- compatible = "oxsemi,ox810se-reset";
- #reset-cells = <1>;
- };
-
- stdclk: stdclk {
- compatible = "oxsemi,ox810se-stdclk";
- #clock-cells = <1>;
- };
- };
-
- rps@300000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges = <0 0x300000 0x100000>;
-
- intc: interrupt-controller@0 {
- compatible = "oxsemi,ox810se-rps-irq";
- interrupt-controller;
- reg = <0 0x200>;
- #interrupt-cells = <1>;
- valid-mask = <0xffffffff>;
- clear-mask = <0xffffffff>;
- };
-
- timer0: timer@200 {
- compatible = "oxsemi,ox810se-rps-timer";
- reg = <0x200 0x40>;
- clocks = <&rpsclk>;
- interrupts = <4 5>;
- };
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts b/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
deleted file mode 100644
index c3daceccde55..000000000000
--- a/arch/arm/boot/dts/ox820-cloudengines-pogoplug-series-3.dts
+++ /dev/null
@@ -1,93 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
- *
- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-#include "ox820.dtsi"
-
-/ {
- model = "Cloud Engines PogoPlug Series 3";
-
- compatible = "cloudengines,pogoplugv3", "oxsemi,ox820";
-
- chosen {
- bootargs = "earlyprintk";
- stdout-path = "serial0:115200n8";
- };
-
- memory {
- /* 128Mbytes DDR */
- reg = <0x60000000 0x8000000>;
- };
-
- aliases {
- serial0 = &uart0;
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- };
-
- leds {
- compatible = "gpio-leds";
-
- blue {
- label = "pogoplug:blue";
- gpios = <&gpio0 2 0>;
- default-state = "keep";
- };
-
- orange {
- label = "pogoplug:orange";
- gpios = <&gpio1 16 1>;
- default-state = "keep";
- };
-
- green {
- label = "pogoplug:green";
- gpios = <&gpio1 17 1>;
- default-state = "keep";
- };
- };
-};
-
-&uart0 {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
-};
-
-&nandc {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_nand>;
-
- nand@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- nand-ecc-mode = "soft";
- nand-ecc-algo = "hamming";
-
- partition@0 {
- label = "boot";
- reg = <0x00000000 0x00e00000>;
- read-only;
- };
-
- partition@e00000 {
- label = "ubi";
- reg = <0x00e00000 0x07200000>;
- };
- };
-};
-
-ða {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_etha_mdio>;
-};
diff --git a/arch/arm/boot/dts/ox820.dtsi b/arch/arm/boot/dts/ox820.dtsi
deleted file mode 100644
index dde4364892bf..000000000000
--- a/arch/arm/boot/dts/ox820.dtsi
+++ /dev/null
@@ -1,299 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * ox820.dtsi - Device tree file for Oxford Semiconductor OX820 SoC
- *
- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/oxsemi,ox820.h>
-#include <dt-bindings/reset/oxsemi,ox820.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "oxsemi,ox820";
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- enable-method = "oxsemi,ox820-smp";
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,arm11mpcore";
- clocks = <&armclk>;
- reg = <0>;
- };
-
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,arm11mpcore";
- clocks = <&armclk>;
- reg = <1>;
- };
- };
-
- memory {
- device_type = "memory";
- /* Max 512MB @ 0x60000000 */
- reg = <0x60000000 0x20000000>;
- };
-
- clocks {
- osc: oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
-
- gmacclk: gmacclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- };
-
- sysclk: sysclk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <4>;
- clock-mult = <1>;
- clocks = <&osc>;
- };
-
- plla: plla {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <850000000>;
- };
-
- armclk: armclk {
- compatible = "fixed-factor-clock";
- #clock-cells = <0>;
- clock-div = <2>;
- clock-mult = <1>;
- clocks = <&plla>;
- };
- };
-
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges;
- interrupt-parent = <&gic>;
-
- nandc: nand-controller@41000000 {
- compatible = "oxsemi,ox820-nand";
- reg = <0x41000000 0x100000>;
- clocks = <&stdclk CLK_820_NAND>;
- resets = <&reset RESET_NAND>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- etha: ethernet@40400000 {
- compatible = "oxsemi,ox820-dwmac", "snps,dwmac";
- reg = <0x40400000 0x2000>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq", "eth_wake_irq";
- mac-address = [000000000000]; /* Filled in by U-Boot */
- phy-mode = "rgmii";
-
- clocks = <&stdclk CLK_820_ETHA>, <&gmacclk>;
- clock-names = "gmac", "stmmaceth";
- resets = <&reset RESET_MAC>;
-
- /* Regmap for sys registers */
- oxsemi,sys-ctrl = <&sys>;
-
- status = "disabled";
- };
-
- apb-bridge@44000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges = <0 0x44000000 0x1000000>;
-
- pinctrl: pinctrl {
- compatible = "oxsemi,ox820-pinctrl";
-
- /* Regmap for sys registers */
- oxsemi,sys-ctrl = <&sys>;
-
- pinctrl_uart0: uart0 {
- uart0 {
- pins = "gpio30", "gpio31";
- function = "fct5";
- };
- };
-
- pinctrl_uart0_modem: uart0_modem {
- uart0_modem_a {
- pins = "gpio24", "gpio24", "gpio26", "gpio27";
- function = "fct4";
- };
- uart0_modem_b {
- pins = "gpio28", "gpio29";
- function = "fct5";
- };
- };
-
- pinctrl_uart1: uart1 {
- uart1 {
- pins = "gpio7", "gpio8";
- function = "fct4";
- };
- };
-
- pinctrl_uart1_modem: uart1_modem {
- uart1_modem {
- pins = "gpio5", "gpio6", "gpio40", "gpio41", "gpio42", "gpio43";
- function = "fct4";
- };
- };
-
- pinctrl_etha_mdio: etha_mdio {
- etha_mdio {
- pins = "gpio3", "gpio4";
- function = "fct1";
- };
- };
-
- pinctrl_nand: nand {
- nand {
- pins = "gpio12", "gpio13", "gpio14", "gpio15",
- "gpio16", "gpio17", "gpio18", "gpio19",
- "gpio20", "gpio21", "gpio22", "gpio23",
- "gpio24";
- function = "fct1";
- };
- };
- };
-
- gpio0: gpio@0 {
- compatible = "oxsemi,ox820-gpio";
- reg = <0x000000 0x100000>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- ngpios = <32>;
- oxsemi,gpio-bank = <0>;
- gpio-ranges = <&pinctrl 0 0 32>;
- };
-
- gpio1: gpio@100000 {
- compatible = "oxsemi,ox820-gpio";
- reg = <0x100000 0x100000>;
- interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- ngpios = <18>;
- oxsemi,gpio-bank = <1>;
- gpio-ranges = <&pinctrl 0 32 18>;
- };
-
- uart0: serial@200000 {
- compatible = "ns16550a";
- reg = <0x200000 0x100000>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <0>;
- fifo-size = <16>;
- reg-io-width = <1>;
- current-speed = <115200>;
- no-loopback-test;
- status = "disabled";
- clocks = <&sysclk>;
- resets = <&reset RESET_UART1>;
- };
-
- uart1: serial@300000 {
- compatible = "ns16550a";
- reg = <0x200000 0x100000>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- reg-shift = <0>;
- fifo-size = <16>;
- reg-io-width = <1>;
- current-speed = <115200>;
- no-loopback-test;
- status = "disabled";
- clocks = <&sysclk>;
- resets = <&reset RESET_UART2>;
- };
-
- rps@400000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges = <0 0x400000 0x100000>;
-
- intc: interrupt-controller@0 {
- compatible = "oxsemi,ox820-rps-irq", "oxsemi,ox810se-rps-irq";
- interrupt-controller;
- reg = <0 0x200>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <1>;
- valid-mask = <0xffffffff>;
- clear-mask = <0xffffffff>;
- };
-
- timer0: timer@200 {
- compatible = "oxsemi,ox820-rps-timer";
- reg = <0x200 0x40>;
- clocks = <&sysclk>;
- interrupt-parent = <&intc>;
- interrupts = <4>;
- };
- };
-
- sys: sys-ctrl@e00000 {
- compatible = "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd";
- reg = <0xe00000 0x200000>;
-
- reset: reset-controller {
- compatible = "oxsemi,ox820-reset", "oxsemi,ox810se-reset";
- #reset-cells = <1>;
- };
-
- stdclk: stdclk {
- compatible = "oxsemi,ox820-stdclk", "oxsemi,ox810se-stdclk";
- #clock-cells = <1>;
- };
- };
- };
-
- apb-bridge@47000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- ranges = <0 0x47000000 0x1000000>;
-
- scu: scu@0 {
- compatible = "arm,arm11mp-scu";
- reg = <0x0 0x100>;
- };
-
- local-timer@600 {
- compatible = "arm,arm11mp-twd-timer";
- reg = <0x600 0x20>;
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3)|IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&armclk>;
- };
-
- gic: interrupt-controller@1000 {
- compatible = "arm,arm11mp-gic";
- interrupt-controller;
- #interrupt-cells = <3>;
- reg = <0x1000 0x1000>,
- <0x100 0x500>;
- };
- };
- };
-};
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH RFC v2 2/4] ARM: oxnas: remove OXNAS support
2023-04-03 7:42 [PATCH RFC v2 0/4] ARM: oxnas support removal Neil Armstrong
2023-04-03 7:42 ` [PATCH RFC v2 1/4] ARM: dts: oxnas: remove obsolete device tree files Neil Armstrong
@ 2023-04-03 7:42 ` Neil Armstrong
2023-04-03 7:42 ` [PATCH RFC v2 3/4] ARM: configs: remove oxnas_v6_defconfig Neil Armstrong
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2023-04-03 7:42 UTC (permalink / raw)
To: Arnd Bergmann, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-oxnas,
Neil Armstrong, Linus Walleij, Daniel Golle
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 ARM support.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm/Kconfig | 2 -
arch/arm/Makefile | 1 -
arch/arm/mach-oxnas/Kconfig | 38 -----------------
arch/arm/mach-oxnas/Makefile | 2 -
arch/arm/mach-oxnas/headsmp.S | 23 -----------
arch/arm/mach-oxnas/platsmp.c | 96 -------------------------------------------
6 files changed, 162 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e24a9820e12f..017329401b3d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -497,8 +497,6 @@ source "arch/arm/mach-omap2/Kconfig"
source "arch/arm/mach-orion5x/Kconfig"
-source "arch/arm/mach-oxnas/Kconfig"
-
source "arch/arm/mach-pxa/Kconfig"
source "arch/arm/mach-qcom/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 485a439e22ca..547e5856eaa0 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -203,7 +203,6 @@ machine-$(CONFIG_ARCH_MSTARV7) += mstar
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
machine-$(CONFIG_ARCH_NPCM) += npcm
machine-$(CONFIG_ARCH_NSPIRE) += nspire
-machine-$(CONFIG_ARCH_OXNAS) += oxnas
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
diff --git a/arch/arm/mach-oxnas/Kconfig b/arch/arm/mach-oxnas/Kconfig
deleted file mode 100644
index a9ded7079268..000000000000
--- a/arch/arm/mach-oxnas/Kconfig
+++ /dev/null
@@ -1,38 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-menuconfig ARCH_OXNAS
- bool "Oxford Semiconductor OXNAS Family SoCs"
- depends on (ARCH_MULTI_V5 && CPU_LITTLE_ENDIAN) || ARCH_MULTI_V6
- select ARCH_HAS_RESET_CONTROLLER
- select COMMON_CLK_OXNAS
- select GPIOLIB
- select MFD_SYSCON
- select OXNAS_RPS_TIMER
- select PINCTRL_OXNAS
- select RESET_CONTROLLER
- select RESET_OXNAS
- select VERSATILE_FPGA_IRQ
- select PINCTRL
- help
- Support for OxNas SoC family developed by Oxford Semiconductor.
-
-if ARCH_OXNAS
-
-config MACH_OX810SE
- bool "Support OX810SE Based Products"
- depends on ARCH_MULTI_V5
- select CPU_ARM926T
- help
- Include Support for the Oxford Semiconductor OX810SE SoC Based Products.
-
-config MACH_OX820
- bool "Support OX820 Based Products"
- depends on ARCH_MULTI_V6
- select ARM_GIC
- select DMA_CACHE_RWFO if SMP
- select HAVE_SMP
- select HAVE_ARM_SCU if SMP
- select HAVE_ARM_TWD if SMP
- help
- Include Support for the Oxford Semiconductor OX820 SoC Based Products.
-
-endif
diff --git a/arch/arm/mach-oxnas/Makefile b/arch/arm/mach-oxnas/Makefile
deleted file mode 100644
index 0e78ecfe6c49..000000000000
--- a/arch/arm/mach-oxnas/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_SMP) += platsmp.o headsmp.o
diff --git a/arch/arm/mach-oxnas/headsmp.S b/arch/arm/mach-oxnas/headsmp.S
deleted file mode 100644
index 9c0f1479f33a..000000000000
--- a/arch/arm/mach-oxnas/headsmp.S
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
- * Copyright (c) 2003 ARM Limited
- * All Rights Reserved
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-
- __INIT
-
-/*
- * OX820 specific entry point for secondary CPUs.
- */
-ENTRY(ox820_secondary_startup)
- mov r4, #0
- /* invalidate both caches and branch target cache */
- mcr p15, 0, r4, c7, c7, 0
- /*
- * we've been released from the holding pen: secondary_stack
- * should now contain the SVC stack for this core
- */
- b secondary_startup
diff --git a/arch/arm/mach-oxnas/platsmp.c b/arch/arm/mach-oxnas/platsmp.c
deleted file mode 100644
index f0a50b9e61df..000000000000
--- a/arch/arm/mach-oxnas/platsmp.c
+++ /dev/null
@@ -1,96 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
- * Copyright (C) 2002 ARM Ltd.
- * All Rights Reserved
- */
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-
-#include <asm/cacheflush.h>
-#include <asm/cp15.h>
-#include <asm/smp_plat.h>
-#include <asm/smp_scu.h>
-
-extern void ox820_secondary_startup(void);
-
-static void __iomem *cpu_ctrl;
-static void __iomem *gic_cpu_ctrl;
-
-#define HOLDINGPEN_CPU_OFFSET 0xc8
-#define HOLDINGPEN_LOCATION_OFFSET 0xc4
-
-#define GIC_NCPU_OFFSET(cpu) (0x100 + (cpu)*0x100)
-#define GIC_CPU_CTRL 0x00
-#define GIC_CPU_CTRL_ENABLE 1
-
-static int __init ox820_boot_secondary(unsigned int cpu,
- struct task_struct *idle)
-{
- /*
- * Write the address of secondary startup into the
- * system-wide flags register. The BootMonitor waits
- * until it receives a soft interrupt, and then the
- * secondary CPU branches to this address.
- */
- writel(virt_to_phys(ox820_secondary_startup),
- cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET);
-
- writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET);
-
- /*
- * Enable GIC cpu interface in CPU Interface Control Register
- */
- writel(GIC_CPU_CTRL_ENABLE,
- gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL);
-
- /*
- * Send the secondary CPU a soft interrupt, thereby causing
- * the boot monitor to read the system wide flags register,
- * and branch to the address found there.
- */
- arch_send_wakeup_ipi_mask(cpumask_of(cpu));
-
- return 0;
-}
-
-static void __init ox820_smp_prepare_cpus(unsigned int max_cpus)
-{
- struct device_node *np;
- void __iomem *scu_base;
-
- np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-scu");
- scu_base = of_iomap(np, 0);
- of_node_put(np);
- if (!scu_base)
- return;
-
- /* Remap CPU Interrupt Interface Registers */
- np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-gic");
- gic_cpu_ctrl = of_iomap(np, 1);
- of_node_put(np);
- if (!gic_cpu_ctrl)
- goto unmap_scu;
-
- np = of_find_compatible_node(NULL, NULL, "oxsemi,ox820-sys-ctrl");
- cpu_ctrl = of_iomap(np, 0);
- of_node_put(np);
- if (!cpu_ctrl)
- goto unmap_scu;
-
- scu_enable(scu_base);
- flush_cache_all();
-
-unmap_scu:
- iounmap(scu_base);
-}
-
-static const struct smp_operations ox820_smp_ops __initconst = {
- .smp_prepare_cpus = ox820_smp_prepare_cpus,
- .smp_boot_secondary = ox820_boot_secondary,
-};
-
-CPU_METHOD_OF_DECLARE(ox820_smp, "oxsemi,ox820-smp", &ox820_smp_ops);
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH RFC v2 3/4] ARM: configs: remove oxnas_v6_defconfig
2023-04-03 7:42 [PATCH RFC v2 0/4] ARM: oxnas support removal Neil Armstrong
2023-04-03 7:42 ` [PATCH RFC v2 1/4] ARM: dts: oxnas: remove obsolete device tree files Neil Armstrong
2023-04-03 7:42 ` [PATCH RFC v2 2/4] ARM: oxnas: remove OXNAS support Neil Armstrong
@ 2023-04-03 7:42 ` Neil Armstrong
2023-04-03 7:42 ` [PATCH RFC v2 4/4] dt-bindings: arm: oxnas: remove obsolete bindings Neil Armstrong
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2023-04-03 7:42 UTC (permalink / raw)
To: Arnd Bergmann, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-oxnas,
Neil Armstrong, Linus Walleij, Daniel Golle
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX820 specific defconfig.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm/configs/oxnas_v6_defconfig | 92 -------------------------------------
1 file changed, 92 deletions(-)
diff --git a/arch/arm/configs/oxnas_v6_defconfig b/arch/arm/configs/oxnas_v6_defconfig
deleted file mode 100644
index 70a67b3fc91b..000000000000
--- a/arch/arm/configs/oxnas_v6_defconfig
+++ /dev/null
@@ -1,92 +0,0 @@
-CONFIG_SYSVIPC=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_CGROUPS=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
-CONFIG_PERF_EVENTS=y
-CONFIG_STRICT_KERNEL_RWX=y
-CONFIG_STRICT_MODULE_RWX=y
-CONFIG_ARCH_MULTI_V6=y
-CONFIG_ARCH_OXNAS=y
-CONFIG_MACH_OX820=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=16
-CONFIG_ARCH_FORCE_MAX_ORDER=12
-CONFIG_SECCOMP=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_KEXEC=y
-CONFIG_EFI=y
-CONFIG_CPU_IDLE=y
-CONFIG_ARM_CPUIDLE=y
-CONFIG_VFP=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_CMDLINE_PARTITION=y
-CONFIG_CMA=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_OPTIMISTIC_DAD=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_MTD_NAND_OXNAS=y
-CONFIG_MTD_UBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_NETDEVICES=y
-CONFIG_STMMAC_ETH=y
-CONFIG_REALTEK_PHY=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_GPIO_GENERIC_PLATFORM=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_CLASS_FLASH=m
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_ONESHOT=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_CPU=y
-CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_ARM_TIMER_SP804=y
-CONFIG_EXT4_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_UBIFS_FS=y
-CONFIG_PSTORE=y
-CONFIG_PSTORE_CONSOLE=y
-CONFIG_PSTORE_PMSG=y
-CONFIG_PSTORE_RAM=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_DMA_CMA=y
-CONFIG_CMA_SIZE_MBYTES=64
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH RFC v2 4/4] dt-bindings: arm: oxnas: remove obsolete bindings
2023-04-03 7:42 [PATCH RFC v2 0/4] ARM: oxnas support removal Neil Armstrong
` (2 preceding siblings ...)
2023-04-03 7:42 ` [PATCH RFC v2 3/4] ARM: configs: remove oxnas_v6_defconfig Neil Armstrong
@ 2023-04-03 7:42 ` Neil Armstrong
2023-04-03 18:36 ` [PATCH RFC v2 0/4] ARM: oxnas support removal Rob Herring
2023-04-04 14:37 ` Arnd Bergmann
5 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2023-04-03 7:42 UTC (permalink / raw)
To: Arnd Bergmann, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-oxnas,
Neil Armstrong, Krzysztof Kozlowski, Linus Walleij, Daniel Golle
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove the
OX810 and OX820 SoC and boards bindings.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Documentation/devicetree/bindings/arm/oxnas.txt | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/oxnas.txt b/Documentation/devicetree/bindings/arm/oxnas.txt
deleted file mode 100644
index ac64e60f99f1..000000000000
--- a/Documentation/devicetree/bindings/arm/oxnas.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-Oxford Semiconductor OXNAS SoCs Family device tree bindings
--------------------------------------------
-
-Boards with the OX810SE SoC shall have the following properties:
- Required root node property:
- compatible: "oxsemi,ox810se"
-
-Boards with the OX820 SoC shall have the following properties:
- Required root node property:
- compatible: "oxsemi,ox820"
-
-Board compatible values:
- - "wd,mbwe" (OX810SE)
- - "cloudengines,pogoplugv3" (OX820)
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH RFC v2 0/4] ARM: oxnas support removal
2023-04-03 7:42 [PATCH RFC v2 0/4] ARM: oxnas support removal Neil Armstrong
` (3 preceding siblings ...)
2023-04-03 7:42 ` [PATCH RFC v2 4/4] dt-bindings: arm: oxnas: remove obsolete bindings Neil Armstrong
@ 2023-04-03 18:36 ` Rob Herring
2023-04-04 14:37 ` Arnd Bergmann
5 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2023-04-03 18:36 UTC (permalink / raw)
To: Neil Armstrong
Cc: Arnd Bergmann, Olof Johansson, soc, Krzysztof Kozlowski,
Russell King, linux-arm-kernel, devicetree, linux-kernel,
linux-oxnas, Linus Walleij, Daniel Golle, Krzysztof Kozlowski
On Mon, Apr 03, 2023 at 09:42:17AM +0200, Neil Armstrong wrote:
> With [1] removing MPCore SMP support, this makes the OX820 barely usable,
> associated with a clear lack of maintainance, development and migration to
> dt-schema it's clear that Linux support for OX810 and OX820 should be removed.
>
> In addition, the OX810 hasn't been booted for years and isn't even present
> in an ARM config file.
>
> For the OX820, lack of USB and SATA support makes the platform not usable
> in the current Linux support and relies on off-tree drivers hacked from the
> vendor (defunct for years) sources.
>
> The last users are in the OpenWRT distribution, and today's removal means
> support will still be in stable 6.1 LTS kernel until end of 2026.
>
> If someone wants to take over the development even with lack of SMP, I'll
> be happy to hand off maintainance.
>
> The plan is to apply the first 4 patches first, then the drivers
> followed by bindings. Finally the MAINTAINANCE entry can be removed.
>
> I'm not sure about the process of bindings removal, but perhaps the bindings
> should be marked as deprecated first then removed later on ?
Nah, just remove them. Like the code, we can always bring them back if
needed.
Rob
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH RFC v2 0/4] ARM: oxnas support removal
2023-04-03 7:42 [PATCH RFC v2 0/4] ARM: oxnas support removal Neil Armstrong
` (4 preceding siblings ...)
2023-04-03 18:36 ` [PATCH RFC v2 0/4] ARM: oxnas support removal Rob Herring
@ 2023-04-04 14:37 ` Arnd Bergmann
2023-04-04 14:43 ` Neil Armstrong
5 siblings, 1 reply; 8+ messages in thread
From: Arnd Bergmann @ 2023-04-04 14:37 UTC (permalink / raw)
To: Neil Armstrong, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-oxnas@groups.io,
Linus Walleij, Daniel Golle, Krzysztof Kozlowski
On Mon, Apr 3, 2023, at 09:42, Neil Armstrong wrote:
> With [1] removing MPCore SMP support, this makes the OX820 barely usable,
> associated with a clear lack of maintainance, development and migration to
> dt-schema it's clear that Linux support for OX810 and OX820 should be removed.
>
> In addition, the OX810 hasn't been booted for years and isn't even present
> in an ARM config file.
>
> For the OX820, lack of USB and SATA support makes the platform not usable
> in the current Linux support and relies on off-tree drivers hacked from the
> vendor (defunct for years) sources.
>
> The last users are in the OpenWRT distribution, and today's removal means
> support will still be in stable 6.1 LTS kernel until end of 2026.
>
> If someone wants to take over the development even with lack of SMP, I'll
> be happy to hand off maintainance.
>
> The plan is to apply the first 4 patches first, then the drivers
> followed by bindings. Finally the MAINTAINANCE entry can be removed.
>
I merged all four into the soc tree now, thanks!
Arnd
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH RFC v2 0/4] ARM: oxnas support removal
2023-04-04 14:37 ` Arnd Bergmann
@ 2023-04-04 14:43 ` Neil Armstrong
0 siblings, 0 replies; 8+ messages in thread
From: Neil Armstrong @ 2023-04-04 14:43 UTC (permalink / raw)
To: Arnd Bergmann, Olof Johansson, soc, Rob Herring,
Krzysztof Kozlowski, Russell King
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-oxnas@groups.io,
Linus Walleij, Daniel Golle, Krzysztof Kozlowski
On 04/04/2023 16:37, Arnd Bergmann wrote:
> On Mon, Apr 3, 2023, at 09:42, Neil Armstrong wrote:
>> With [1] removing MPCore SMP support, this makes the OX820 barely usable,
>> associated with a clear lack of maintainance, development and migration to
>> dt-schema it's clear that Linux support for OX810 and OX820 should be removed.
>>
>> In addition, the OX810 hasn't been booted for years and isn't even present
>> in an ARM config file.
>>
>> For the OX820, lack of USB and SATA support makes the platform not usable
>> in the current Linux support and relies on off-tree drivers hacked from the
>> vendor (defunct for years) sources.
>>
>> The last users are in the OpenWRT distribution, and today's removal means
>> support will still be in stable 6.1 LTS kernel until end of 2026.
>>
>> If someone wants to take over the development even with lack of SMP, I'll
>> be happy to hand off maintainance.
>>
>> The plan is to apply the first 4 patches first, then the drivers
>> followed by bindings. Finally the MAINTAINANCE entry can be removed.
>>
>
> I merged all four into the soc tree now, thanks!
Thanks for handling this !
Neil
>
> Arnd
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